Motorola DSP96002 User Manual

Page 817

MOTOROLA

In Timer Modes 4 and 5, however, the TCR will be loaded with the current value of the
counter on the appropriate edge of the TIO input signal (rather than with a value specified
by the user program). The value loaded to the TCR represents the width or the period of
the signal coming in on the TIO pin, depending on the timer mode. See Sections 6.4.4 and
6.4.5 for detailed descriptions of Timer Modes 4 and 5.

6.4

TIMER MODES OF OPERATION

This section gives the details of each of the timer modes of operation. Table 2 on page 33
summarizes the items which determine the timer mode, including the configuration of the
timer control bits, the function of the TIO pin, and the clock source.

6.4.1

Timer Mode 0 (Standard Timer Mode, Internal Clock, No Timer Output)

Timer Mode 0 is defined by TCSR bits TC2-TC0 equal to 000.

With the timer enabled (TE=1), the counter is loaded with the value contained by the TCR.
The counter is decremented by a clock derived from the internal DSP clock, divided by
two (CLK/2). During the clock cycle following the point where the counter reaches 0, the
TS bit is set and the timer generates an interrupt. The counter is reloaded with the value
contained by the TCR, and the entire process is repeated until the timer is disabled
(TE=0). Figure 9 illustrates Mode 0 with the timer enabled. Figure 10 illustrates the events
with the timer disabled.

Figure 9 - Standard Timer Mode (Mode 0)

TCR

write to

Counter

first event

last event

N-1

Clock

Interrupt

TCR (N)

(CLK/2)