Motorola DSP96002 - Manual (Page 517)

MOTOROLA DSP96002 USER’S MANUAL A - 329
and
1. BCHG/BCLR/BSET SP
2. JCLR/JSET/JSCLR/JSSET SSH or SSL
and
1. MOVEC/I/M/S to SP
2. JCLR/JSET/JSCLR/JSSET SSH or SSL
and
1. LEA to SP
2. JCLR/JSET/JSCLR/JSSET SSH or SSL
and
1. LRA to SP
2. JCLR/JSET/JSCLR/JSSET SSH or SSL
Also, the instruction MOVEC SSH, SSH is illegal.
A.10.6 R, N, and M Register Restrictions
If an address register Rn is the destination of a MOVE instruction, the new contents will not be available for
use as an address pointer until the second following instruction.
If an offset register Nn or a modifier register Mn is the destination of a MOVE instruction, the new contents
will not be available for use in address calculations until the second following instruction.
From the above definitions, it is clear that if Mn or Nn is the destination of a MOVE instruction, the next
instruction may use the corresponding Rn register as an address pointer if using the No Update or the Ad-
dress Register PC Relative addressing mode (Mn and Nn are ignored).
Also, a MOVE to Nn may be followed by an instruction using Rn as an address pointer if the Long Displace-
ment, Postincrement by 1, Postdecrement by 1, or Predecrement by 1 addressing mode is employed (Nn
is ignored).
A.10.7 Fast Interrupt Routines
DO, (F)TRAPcc, STOP, and WAIT may not be used in a fast interrupt routine. All PC Relative instructions
(Bcc, BScc, FBcc, FBScc, BRA, BSR, BRCLR, BSCLR, BRSET, BSSET, LRA and DOR) should not be
used in fast interrupt routines since the resulting PC Relative address cannot be predicted.