Motorola DSP96002 - Manual (Page 352)

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FSEEDD Reciprocal Approximation FSEEDD
Operation:
Approximation(1/S)
→
D
Assembler Syntax:
FSEEDD S,D
Description:
Take the contents of the specified source operand S, determine an approximation to 1.0/S, and store the
result in the destination operand D. The 9 MSBs of the destination significand are determined by using a
lookup ROM. The remaining bits of the significand are zeroed. This instruction is useful for initializing
floating-point divide algorithms.
The table below describes the operation of the FSEEDD instruction:
Source Operand Result
SNaN or QNaN QNaN
+/- zero +/- infinity
+/- denormalized normalized, then FSEEDD approximation
+/- normalized FSEEDD approximation
+/- infinity +/- zero
Input Operand(s) Precision: SEP Floating-Point.
Output Operand Precision: SEP Floating-Point.
CCR Condition Codes:
C - Not affected.
V - Not affected.
Z - Set if result is zero. Cleared otherwise.
N - Set if result is negative. Cleared otherwise.
I - Set if result is infinity. Cleared otherwise.
LR - Not affected.
–
R - Not affected.
A - Not affected.