Motorola DSP96002 - Manual (Page 474)

A - 286 DSP96002 USER’S MANUAL MOTOROLA
ORC Logical Inclusive OR with Complement ORC
Instruction Fields:
D d d d
Dn.L n n n where nnn = 0-7
S s s s
Dn.L n n n where nnn = 0-7
Timing: 2 + mv oscillator clock cycles
Memory: 1 + mv program words
11 0sss 1001 1ddd
31 14 13 0
OPTIONAL EFFECTIVE ADDRESS EXTENSION
DATA BUS MOVE FIELD
Operation:
D.L v ~S.L
→
D.L (parallel data bus move)
Assembler Syntax:
ORC S,D
( See the MOVE instruction description.)
Description:
Logically inclusive OR the low portion of D with the logical complement of the low portion of S, and store
the result in the low portion of D. This instruction is useful for manipulating bit maps in graphic operations.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C - Not affected.
V - Always cleared.
Z - Set if result is zero. Cleared otherwise.
N - Set if result is negative. Cleared otherwise.
I - Not affected.
LR - Not affected.
–
R - Not affected.
A - Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: ORC S,D ( See the MOVE instruction description.)