Motorola DSP96002 - Manual (Page 407)

MOTOROLA DSP96002 USER’S MANUAL A - 219
LSL Logical Shift Left LSL
Operation:
Assembler Syntax:
LSL D (move syntax - see the Move instruction description.)
LSL S,D (move syntax - see the Move instruction description.)
LSL #bits,D
Description:
Single-bit shift:
Logically shift the low portion of the specified operand one bit to the left. The carry bit receives the MSB
shifted out of the low portion of the source operand. A zero is shifted into the least significant bit of the
destination operand. The result is stored in the low portion of D.
Multi-bit shift:
Logically shift the low portion of the specified operand N bits (up to 63 bits) to the left. The number of bits
to shift is determined by the 11-bit unsigned integer located in the 11 LSBs of the high portion of S, or by
a a 6-bit immediate field in the instruction. The carry bit receives the Nth bit shifted out of the low portion
of the source operand; it is cleared for a shift count of zero. N zeros are shifted into the LSBs of the des-
tination operand. If more than 32 bits are shifted, zeros will be stored in D and the carry bit. The result is
stored in the low portion of D.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C - Set if the last bit shifted out of the operand is set. Cleared otherwise. Cleared for a
shift count of zero.
V - Always cleared.
Z - Set if result is zero. Cleared otherwise.
N - Set if result is negative. Cleared otherwise.
I - Not affected.
LR - Not affected.
–
R - Not affected.
A - Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
31 0
C 0 (parallel data bus move)