Motorola DSP96002 - Manual (Page 255)

MOTOROLA DSP96002 USER’S MANUAL A - 67
CMP Compare CMP
Operation:
S2.L - S1.L (parallel data bus move)
Assembler Syntax:
CMP S1,S2 (move syntax - see the MOVE in-
struction description.)
Description:
Subtract the low portion of the two operands as specified in the operation column above. No result is
stored; however, the condition codes are affected as described below.
CMPG and CMP differ primarily in the definition of the CCR condition code bits LR and R. These differenc-
es are particularly useful in performing clipping operations in graphics applications. In the code segment,
the CMP instruction tests the first point of a line, X0, against X
min
and sets LR accordingly; the FCMPG
instruction tests the second point of a line, X1, against X
min
and sets
–
R depending on the condition of LR.
Note that the line segment will be trivially accepted if A is set (and R=1), whereas the line will be trivially
rejected if
–
R is cleared (and A=0). This choice of accept/reject conditions was selected to permit the CCR
to be initialized by a single ORI instruction.
ORI #$E0,CCR ;SET A,
–
R, LR – i. e.,
;assume line is initially
;accepted and not rejected.
MOVE X:(R0)+N0,D0.L Y:(R4)+,D1.S ;get X0, X
min
CMP D1, D0 X:(R0)-N0, D0.L ;X0-X
min
, get X1
CMPG D1, D0 ;X1=X
min
Input Operand(s) Precision: 32-bit 2’s complement integer.
Output Operand Precision: n.a.
CCR Condition Codes:
C - Set if a borrow is generated from the MSB of the result. Cleared otherwise.
V - Set if result overflows. Cleared otherwise.
Z - Set if result is zero. Cleared otherwise.
N - Set if result is negative. Cleared otherwise.
I - Not affected.
LR - Cleared if result is positive without overflow or zero. Cleared if result is negative
with overflow. Not affected otherwise. See the example for the FCMPG instruction.
–
R - Not affected. See the example for the FCMPG instruction.