Motorola DSP96002 - Manual (Page 12)

MOTOROLA DSP96002 USER’S MANUAL 2 - 9
—
A
–
E (Address Enable) - active low input, must be asserted and deasserted synchronous to
the input clock (CLK) for proper operation. If a bus master,
—
A
–
E is asserted to enable
the A0-A31 address output drivers. If
—
A
–
E is deasserted, the address output drivers
are three-stated. If not a bus master, the address output drivers are three-stated regard-
less of whether
—
A
–
E is asserted or deasserted. The function of
—
A
–
E is to allow mul-
tiplexed bus systems to be implemented. Examples are a multiplexed address/data bus
such as the NuBus

used in the Macintosh II

or a multiplexed address1/address2 bus
used with dual port memories such as dynamic VRAMs. Note that there must be at least
one undriven CLK period between enables for multiplexed buses to allow one bus to
three-state before another bus is enabled. External control is responsible for this timing.
For non-multiplexed systems,
—
A
–
E should be tied low.
—
D
–
E (Data Enable) - active low input, must be asserted and deasserted synchronous to the
input clock (CLK) for proper operation. If a bus master or the Host interface is being read,
—
D
–
E is asserted to enable the D0-D31 data bus output drivers. If
—
D
–
E is deassert-
ed, the data bus output drivers are three-stated. If not a bus master, the data bus output
drivers are three-stated regardless of whether
—
D
–
E is asserted or deasserted. Read-
only bus cycles may be performed even though
—
D
–
E is deasserted. The function of
—
D
–
E is to allow multiplexed bus systems to be implemented. Examples are a multi-
plexed address/data bus such as the NuBus

used in the Macintosh II

or a multi-
plexed data1/data2 bus used for long word transfers with one 32 bit wide memory. Note
that there must be at least one undriven CLK period between enables for multiplexed
buses to allow one bus to three-state before another bus is enabled. External control is
responsible for this timing. For non-multiplexed systems,
—
D
–
E should be tied low.
—
H
–
S (Host Select) - active low input, may change asynchronous to the input clock.
—
H
–
S is
asserted low to enable selection of the Host Interface functions by the address lines A2-
A5. If
—
T
–
S is asserted when
—
H
–
S is asserted, a data transfer will take place with the
Host Interface. Note that both
—
H
–
S and
—
H
–
A must be tied high to disable the Host
Interface. When
—
H
–
A is asserted,
—
H
–
S is ignored.
—
H
–
A (Host Acknowledge) - active low input, may change asynchronous to the input clock.
—
H
–
A is used to acknowledge either an interrupt request or a DMA request to the host
interface. When the host interface is not in DMA mode, asserting
—
T
–
S when
—
H
–
A
and
—
H
–
R are asserted will enable the contents of the host interface interrupt vector
NuBus is a trademark of Texas Instruments, Inc.
Macintosh II is a trademark of Apple Computer, Inc.