Motorola DSP96002 - Manual (Page 64)

MOTOROLA DSP96002 USER’S MANUAL 5 - 11
register is also the destination of the current operation). The DSP96002 does not support double precision.
It does support single extended precision.
5.5.2 Conversion to the Memory Formats
Conversions from the internal double precision format to either of the two memory floating-point formats is
performed whenever a data register is to be stored in memory or any other location external to the Data
ALU. The conversion is actually a "bit rearranging" operation performed automatically by the MOVE in-
structions, and it is only responsible for collecting the required bits from the register and constructing the
32 or 64-bit data field to be stored in memory. This will produce correct results only if the data in the register
is in a precision equal to the specified MOVE precision. For example, for single precision MOVEs the data
must be already rounded to single precision.
Precision conversion to single precision (not format conversion) is accomplished by specifying an appro-
priate rounding operation (this may be an explicit instruction like FTFR.S or an implicit operation like
FADD.S). The result after rounding is still stored in the internal double precision format; however, MOVE
instructions that read it out of the Data ALU do not alter the value due to bit rearrangement. Figure 5-6
shows the bit rearrangement procedure performed by the MOVE instructions.
If a double precision value is to be rounded to single precision and the rounded result should yield a denor-
malized number, two different actions may be performed depending on FZ (Flush-to-Zero) bit in the SR. In
the Flush-to-Zero mode, the result will be stored as zero in the register. In the IEEE mode, the operand will
be first "corrected" by adding to the execution cycle extra cycles for denormalization. However, the data
stored in the register will be in the internal double precision format and the U-tag will be set. The U-tag
indicates that if another Data ALU operation will use this result as an operand, extra cycles should be added
for operand normalization before actually using it.
5.6 OPERAND REFERENCES
The DSP96002 separates operand references into four classes: program, stack, register, and memory ref-
erences. The type of operand reference(s) required for an instruction is specified by both the opcode field
and the data bus movement field of the instruction (see Section 6.3). All operand reference types may not
be used with all instructions.
5.6.1 Program References
Program references (called P references) are references to 32-bit wide program memory space and are
usually instruction reads. Instructions or data operands may be read from or written to program memory
space using the Move Program Memory (MOVEM), Move Peripheral Data (MOVEP), and Move Absolute
Short (MOVES) instructions. Program references may be internal or external memory references depend-
ing on the address and the chip operating mode.
5.6.2 Stack References
Stack references (called S references) are references to a separate 64-bit wide internal memory space
(System Stack) used implicitly to store the PC and SR registers for subroutine calls, interrupts and returns.
In addition to the PC and SR registers, the LA and LC registers are stored on the stack when a program
loop is initiated. The stack space address is always implied by the instruction. Data is written to stack mem-
ory space to save the processor state and is read from the stack to restore the processor state.