Motorola DSP96002 - Manual (Page 69)

5 - 16 DSP96002 USER’S MANUAL MOTOROLA
changed. The type of arithmetic used to increment Rn is determined by Mn. This reference is classified as
a memory reference.
5.7.2.7 Predecrement by 1 -(Rn)
The address of the operand is the contents of the address register Rn decremented by 1. Before the op-
erand address is used, it is decremented (subtracted) by 1 and stored in the same address register. The
type of arithmetic used to increment Rn is determined by Mn. The Nn register is ignored. This reference is
classified as a memory reference.
5.7.2.8 Long displacement (Rn+Label)
This addressing mode requires one word (label) of instruction extension. The address of the operand is
the sum of the contents of the address register Rn and the extension word. The contents of the Rn register
is unchanged. The type of arithmetic used to increment Rn is determined by Mn. The Nn register is ignored.
This reference is classified as a memory reference.
5.7.3 PC Relative Modes
In the PC relative addressing modes, the address of the operand is obtained by adding a displacement,
represented in two’s complement format, to the value of the program counter (PC). The PC always point
to the address of the next instruction, so PC relative addressing with zero displacement will produce the
address of the following instruction.
5.7.3.1 Long Displacement PC Relative
This addressing mode requires one word of instruction extension. The address of the operand is the sum
of the contents of the PC and the extension word.
5.7.3.2 Short Displacement PC Relative
The short displacement occupies 15 bits in the instruction operation word. The displacement is first sign
extended to 32 bits and then added to the PC to obtain the address of the operand.
5.7.3.3 Address Register PC Relative
The address of the operand is the sum of the contents of the address register Rn and the PC. The Mn and
Nn registers are ignored.
5.7.4 Special Address Modes
The special address modes do not use an address register in specifying an effective address. These
modes specify the operand or the address of the operand in a field of the instruction or they implicitly ref-
erence an operand.