Motorola DSP96002 User Manual
Page 733
C-10
DSP96002 USER’S MANUAL
MOTOROLA
algorithm.
5.
Controller and arbitrator: A controller/arbitrator supplies all of the control signals necessary for
the operation of the data ALU.
The data ALU uses the SEP format for all of its operations: the results are automatically rounded to either
SP or SEP. All of the rounding modes specified by the IEEE standard are supported. These rounding modes
are:
1.
Round to nearest (even): a convergent rounding mode, designed to deliver results without a
rounding bias. In this case the infinite-precision result is rounded to the finite-precision result
which is closest. In the case of an absolute tie, the infinite-precision result is rounded to the
"nearest even" finite precision result, as is illustrated in Table C-2.
2.
Round to zero: in this case, the infinite-precision result is rounded to the nearest finite-precision
result which is closest to zero. Clearly, results are rounded up in this mode when negative, and
down when positive.
3.
Round to plus infinity: results are always rounded in the direction of plus infinity, i.e. "up".
4.
Round to minus infinity: results are always rounded in the direction of minus infinity, or "down".
C.1.5.1
Register file and automatic format conversion unit
The general-purpose register file consists of ten 96-bit registers named d0..d9, as shown in Figure C-9.
Each 96-bit register accommodates the DP internal floating point storage format. Each 96-bit register is ob-
tained by the concatenation of three 32-bit registers dn.h:dn.m:dn.l. The registers dn.h, dn.m, and dn.l can
be accessed as individual registers by MOVE operations and integer and logic instructions, as is further de-
scribed in Appendix C.2 and in Appendix A.
The registers d0..d7 are general-purpose registers in the sense that MOVE instructions and data ALU op-
erations do not differentiate between them. They are used for data ALU source and destination operands
for most of the data ALU instructions. They can be used as operands for MOVE operations as well as for
data ALU operations in the same instruction cycle: dual source operands are allowed. They can not be used
as dual destinations in the same instruction cycle.
Figure C-9. The Data ALU’s Register File
d0.h
d0.m
d0.l
d0
d1
d2
d3
d4
d5
d6
d7
d8
d9
95
0