Motorola DSP96002 - Manual (Page 294)

A - 106 DSP96002 USER’S MANUAL MOTOROLA
FCMP Compare Two FCMP
Floating-Point Operands
Operation:
S2 - S1 (parallel data bus move)
Assembler Syntax:
FCMP S1,S2 (move syntax - see the MOVE in-
struction description.)
Description:
Subtract the two operands as specified in the operation column above. No result is stored; however, the
condition codes are affected as described. This instruction differs from FSUB when S1=S2; in this case,
the result is always +0 and therefore, N is cleared. Note that this is true even if S1, S2 are infinity.
Input Operand(s) Precision: SEP Floating-Point.
Output Operand Precision: n.a.
CCR Condition Codes:
(Note: Since there is no destination, there is no rounding and therefore the condition code bits are set as-
suming an infinite precision result)
C - Not affected.
V - Not affected.
Z - Set if source operands are equal. Cleared otherwise.
N - Set if result is negative. Cleared otherwise.
I - Set if anyone of the operands is infinity. Cleared otherwise.
LR - Cleared if result is positive, zero or NaN (if cleared first, print accepted; see the FC-
MPG example). Not affected otherwise.
–
R - Cleared if result is a NaN. Not affected otherwise.
A - Cleared if result is a NaN. Cleared if result is negative and not zero. Not affected
otherwise.
ER Status Bits:
INX -Always cleared.
DZ -Always cleared.
UNF -Always cleared.
OVF -Always cleared.
OPERR-Always cleared.
SNAN -Set if operand is a signaling NaN. Cleared otherwise.
NAN -Set if result is a NaN. Cleared otherwise.
UNCC -Always cleared.
IER Flags: Flags changed according to standard definition.