Motorola DSP96002 - Manual (Page 396)

A - 208 DSP96002 USER’S MANUAL MOTOROLA
JSR Jump to Subroutine JSR
Instruction Fields:
ea Rn - R0-R7 (Memory alterable addressing modes only)
Absolute Address - 32 bits
Short Jump Address - aaaaaaaaaaaaaaa (15 bits)
Timing: 4 + jx oscillator clock cycles
Memory: 1 + ea program words
11 1111 1aaa aaaa
31 14 13 0
0000 0011 11aa aaaa aa
11 1111 1000 0000
31 14 13 0
OPTIONAL EFFECTIVE ADDRESS EXTENSION
0000 0011 0100 MMMR
Operation:
PC
→
SSH; SR
→
SSL; xx
→
PC
PC
→
SSH; SR
→
SSL; ea
→
PC
Assembler Syntax:
JSR label (short)
JSR ea
Description:
The address of the instruction immediately following the JSR instruction and the status register are pushed
onto the stack. Program execution then continues at the effective address in program memory. All mem-
ory alterable addressing modes may be used for the effective address. A fast Short Jump addressing
mode may also be used. The 15-bit data is sign extended to form the effective address. See Section
A.10 for restrictions.
CCR Condition Codes: Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: JSR label (short)
Instruction Format: JSR ea