Motorola DSP96002 - Manual (Page 49)

4 - 10 DSP96002 USER’S MANUAL MOTOROLA
ization, respectively. If FZ is set, floating-point underflows are flushed to zero. Any denormalized source op-
erand is considered as zero (with the sign of the denormalized source operand) and any underflowed results
are flushed to zero (with the sign of the original underflowed result). Cleared during processor reset.
FZ Description
0 IEEE Gradual Underflow with Denormalized Numbers (default)
1 Flush to Zero
4.7.26 MR Interrupt Masks (I1-I0) Bits 28,29
The interrupt mask bits I1 and I0 reflect the current priority level of the processor and indicate the interrupt
priority level (IPL) needed for an interrupt source to interrupt the processor. The current priority level of the
processor may be changed under software control. The interrupt mask bits are set during processor reset.
I1 I0 Exceptions Permitted Exceptions masked
0 0 IPL 0,1,2,3 None
0 1 IPL 1,2,3 IPL 0
1 0 IPL 2,3 IPL 0,1
1 1 IPL 3 IPL 0,1,2
4.7.27 Reserved Status (Bit 30)
This bit is reserved for future expansion and will read as one during read operations. It should be written
with one for future compatibility.
4.7.28 MR Loop Flag (LF) Bit 31
The loop flag bit is set when a program loop is in progress and enables the circuitry which detects the end
of a program loop. The loop flag is the only SR bit which is restored when terminating a program loop. Stack-
ing and restoring the loop flag when initiating and exiting a program loop, respectively, allow the nesting of
program loops. The loop flag is cleared during a processor reset.
4.8 LOOP COUNTER (LC)
The loop counter is a special 32-bit counter used to specify the number of times to repeat a hardware pro-
gram loop. This register is stacked by a DO instruction and unstacked by end of loop processing or by ex-
ecution of an ENDDO instruction. When the end of a hardware program loop is reached, the contents of the
loop counter register are tested for one. If the loop counter is one, the program loop is terminated and the
LC register is loaded with the previous LC contents stored on the stack. If the counter is not one, it is dec-
remented by 1 and the program loop is repeated. The loop counter may be read under program control. This
allows the number of times a loop has been executed to be determined during execution. LC is also used
in the REP instruction.
4.9 LOOP ADDRESS REGISTER (LA)
The loop address register indicates the location of the last instruction word in a program loop. This register
is stacked by a DO instruction and unstacked by end of loop processing or by execution of an ENDDO in-
struction. When the instruction word at the address contained in this register is fetched, the contents of LC