Motorola DSP96002 - Manual (Page 66)

MOTOROLA DSP96002 USER’S MANUAL 5 - 13
5.6.4 Memory References
Memory references are references to the 32-bit wide X or Y memory spaces and may be internal or external
memory references depending on the effective address of the operand in the data bus movement field of
the instruction. Data may be read or written from any address in either memory space.
5.6.4.1 X Memory References
The operand is in X memory space and is a word reference. Data may be read from memory to a register
or from a register to memory.
5.6.4.2 Y Memory References
The operand is in Y memory space and is a word reference. Data may be read from memory to a register
or from a register to memory.
5.6.4.3 L Memory References
L memory space references both X and Y memory spaces with one operand address. L memory space is
developed by the concatenation (X:Y) of X and Y memory spaces. The data operand is a long word refer-
ence. The high-order word of the operand is in X memory; the low-order word of the operand is in Y mem-
ory. Data may be transferred between memory and concatenated registers (i.e., Dn.M:Dn.L) or double pre-
cision registers (i.e., Dn.D).
5.6.4.4 XY Memory References
XY memory space references both X and Y memory spaces with two operand addresses. One word op-
erand is in X memory space and one word operand is in Y memory space.
5.6.4.4.1 Two independent addresses
Two independent addresses are used to access two word operands. Two effective addresses in the in-
struction are used to derive two independent operand addresses - one operand address may reference X
memory space or Y memory space and the other operand address must reference the other memory
space. One of the two effective addresses specified in the instruction must reference one of the address
registers R0-R3, and the other effective address must reference one of the address registers R4-R7. Ad-
dressing modes are restricted to no-update and post-update by +1, -1, and +N addressing modes. Refer
to Section 5.7 for a description of the addressing modes. Each effective address provides independent
read/write control for its memory space. Data may be read from memory to a register or from a register to
memory.
5.6.4.4.2 One common address
One common address is used to access two word operands. One effective address in the instruction is
used to derive two indentical operand addresses referencing X and Y memory spaces. The effective ad-
dress specified in the instruction references one of the address registers R0-R7. All address register indi-
rect addressing modes may be used. Refer to Section 5.7 for a description of the addressing modes. The
effective address provides a common read/write control for both memory spaces. Data may be read from
memory to a register or from a register to memory.