External clock input specifications – Teledyne LeCroy USB Protocol Suite User Manual (Voyager_Advisor T3_Mercury) User Manual
Page 279

USB Protocol Suite User Manual
279
Recording Options ‐ Misc. USB 3.0 for Voyager
Teledyne LeCroy Corporation
not exceed 1700 mV. Note that these voltages are single ended, because only one of the
differential signals is connected using the coaxial cable.
Note:
On Voyager M3i only, there is an option to use the Internal 10‐Mbps clock as a clock source. The
Voyager 5‐MHz clock is on both the Clock‐A‐Out and Clock‐B‐Out connectors. However,
Teledyne LeCroy does not recommend using the Voyager clock. Voyager clock input is AC
coupled and has no requirement for common mode voltage.
For Host emulation, connect Clock Out A to Clock In A. You can use Clock Out B as
the clock source for the DUT.
For Device emulation, connect Clock Out B to Clock In B. You can use Clock Out A
as the clock source for the DUT.
IMPORTANT: If you switch from Very Slow Clock back to Gigabit data rates, you must save
the recording options and then power‐cycle the Voyager.
External Clock Input Specifications
The external clock input is 3.3 volt LVPECL and operates on the USB 3.0 differential signals
only (not USB 2.0 signals). Device setup should be AC coupled at the clock input with a
10 uF ceramic capacitor.
When enabled, the external slow clock option affects both the SuperSpeed analyzer
(record) and the exerciser (transmit) frequencies. The clock source must be able to drive a
50 ohm load with a minimum peak‐to‐peak voltage swing of 200 mV. Maximum peak‐to‐
peak voltage swing should not exceed 1700 mV. Note that these voltages are single
ended, as only one of the differential signals is connected via the coaxial cable.
When operating at 1.25 Gbps to 5 Gbps modes, the data lines are directly connected to
Rocket I/O ports. The very slow external clock mode will bypass the high speed Rocket I/O
logic and use a SERDES implemented in the FPGA fabric. The low end of clock speed is
limited by the value of the AC coupling caps on the inputs and the trace impedance. The
SMA inputs use a 0.1 uF capacitor with a nominal trace impedance of 50 ohms. This
mandates the 350 kHz slow clock limit over the Voyager SMA inputs.
Some software‐based emulation environments require rates as low as 10 Hz. For this
application, Teledyne LeCroy offers a one‐time customization of the Voyager hardware
platform by removing the 0.1 uF capacitor on the Voyager SMA inputs, allowing the clock
inputs to track externally supplied clock frequencies below 350 kHz. Although removal of
this capacitor will render the SMA input ports non‐compliant with 5 Gbps signaling, the
native USB 3.0 connectors will continue to operate within the USB 3.0 electrical
specification.