Rainbow Electronics DS3170 - Manual (Page 5)

DS3170 DS3/E3 Single-Chip Transceiver
5 of 233
9.2.5 Gapped Clocks..................................................................................................................................... 63
9.3 R ESET AND P OWER -D OWN ............................................................................................................................ 63
9.4 G LOBAL R ESOURCES ..................................................................................................................................... 66
9.4.1 Clock Rate Adapter (CLAD)................................................................................................................. 66
9.4.2 8 kHz Reference Generation ............................................................................................................... 66
9.4.3 One Second Reference Generation..................................................................................................... 67
9.4.4 General-Purpose IO Pins ..................................................................................................................... 68
9.4.5 Performance Monitor Counter Update Details ..................................................................................... 69
9.4.6 Transmit Manual Error Insertion .......................................................................................................... 70
9.5 P ORT R ESOURCES ........................................................................................................................................ 71
9.5.1 Loopbacks............................................................................................................................................ 71
9.5.2 Loss Of Signal Propagation ................................................................................................................. 73
9.5.3 AIS Logic .............................................................................................................................................. 73
9.5.4 Loop Timing Mode ............................................................................................................................... 75
9.5.5 HDLC Overhead Controller .................................................................................................................. 75
9.5.6 Trail Trace ............................................................................................................................................ 75
9.5.7 BERT.................................................................................................................................................... 75
9.5.8 System Port Pins.................................................................................................................................. 76
9.5.9 Framing Modes .................................................................................................................................... 77
9.5.10 Line Interface Modes............................................................................................................................ 77
9.6 DS3/E3 F RAMER / F ORMATTER ..................................................................................................................... 79
9.6.1 General Description ............................................................................................................................. 79
9.6.2 Features ............................................................................................................................................... 79
9.6.3 Transmit Formatter............................................................................................................................... 80
9.6.4 Receive Framer.................................................................................................................................... 80
9.6.5 C-bit DS3 Framer/Formatter ................................................................................................................ 84
9.6.6 M23 DS3 Framer/Formatter ................................................................................................................. 87
9.6.7 G.751 E3 Framer/Formatter................................................................................................................. 89
9.6.8 G.832 E3 Framer/Formatter................................................................................................................. 91
9.7 HDLC O VERHEAD C ONTROLLER .................................................................................................................... 96
9.7.1 General Description ............................................................................................................................. 96
9.7.2 Features ............................................................................................................................................... 97
9.7.3 Transmit FIFO ...................................................................................................................................... 97
9.7.4 Transmit HDLC Overhead Processor .................................................................................................. 98
9.7.5 Receive HDLC Overhead Processor ................................................................................................... 98
9.7.6 Receive FIFO ....................................................................................................................................... 99
9.8 T RAIL T RACE C ONTROLLER ............................................................................................................................ 99
9.8.1 General Description ............................................................................................................................. 99
9.8.2 Features ............................................................................................................................................. 100
9.8.3 Functional Description........................................................................................................................ 100
9.8.4 Transmit Data Storage ....................................................................................................................... 101
9.8.5 Transmit Trace ID Processor ............................................................................................................. 101
9.8.6 Transmit Trail Trace Processing ........................................................................................................ 101
9.8.7 Receive Trace ID Processor .............................................................................................................. 101
9.8.8 Receive Trail Trace Processing ......................................................................................................... 101
9.8.9 Receive Data Storage ........................................................................................................................ 102
9.9 FEAC C ONTROLLER ................................................................................................................................... 102
9.9.1 General Description ........................................................................................................................... 102
9.9.2 Features ............................................................................................................................................. 103
9.9.3 Functional Description........................................................................................................................ 103
9.10 L INE E NCODER /D ECODER ............................................................................................................................ 104
9.10.1 General Description ........................................................................................................................... 104
9.10.2 Features ............................................................................................................................................. 105
9.10.3 B3ZS/HDB3 Encoder ......................................................................................................................... 105
9.10.4 Transmit Line Interface ...................................................................................................................... 105
9.10.5 Receive Line Interface ....................................................................................................................... 106
9.10.6 B3ZS/HDB3 Decoder ......................................................................................................................... 106
9.11 BERT......................................................................................................................................................... 108
9.11.1 General Description ........................................................................................................................... 108