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Tt.rsrie, Tt.rir – Rainbow Electronics DS3170 User Manual

Page 172

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DS3170 DS3/E3 Single-Chip Transceiver

172 of 233

Register Name:

TT.RSRIE

Register Description:

Trail Trace Receive Status Register Interrupt Enable

Register Address:

0F8h


Bit

# 15 14 13 12 11 10 9 8

Name

-- -- -- -- -- -- -- --

Default

0 0 0 0 0 0 0 0


Bit

# 7 6 5 4 3 2 1 0

Name

-- -- -- --

RTICIE

RTIMIE

RTIUIE

RIDLIE

Default

0 0 0 0 0 0 0 0


Bit 3: Receive Trail Trace Identifier Change Interrupt Enable (RTICIE) – This bit enables an interrupt if the
TT.RSRL.RTICL bit is set and the bit in

GL.ISRIE

.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 2: Receive Trail Trace Identifier Mismatch Interrupt Enable (RTIMIE) – This bit enables an interrupt if the
TT.RSRL.RTIML bit is set and the bit in

GL.ISRIE

.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 1: Receive Trail Trace Identifier Unstable Interrupt Enable (RTIUIE) – This bit enables an interrupt if the
TT.RSRL.RTIUL bit is set and the bit in

GL.ISRIE

.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 0: Receive Trail Trace Identifier Idle Interrupt Enable (RIDLIE) – This bit enables an interrupt if the
TT.RSRL.RIDLL bit is set and the bit in

GL.ISRIE

.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled


Register Name:

TT.RIR

Register Description:

Trail Trace Receive Identifier Register

Register Address:

0FCh


Bit

# 15 14 13 12 11 10 9 8

Name

-- -- -- -- -- -- -- --

Default

0 0 0 0 0 0 0 0


Bit

# 7 6 5 4 3 2 1 0

Name RTD7 RTD6 RTD5 RTD4 RTD3 RTD2 RTD1 RTD0
Default

0 0 0 0 0 0 0 0


Bits 7 to 0: Receive Trail Trace Identifier Data (RTD[7:0]) – These eight bits are the receive trail trace identifier
data. The receive trail trace identifier address will be incremented whenever these bits are read (when byte Fh is
read, the address will return to 0h).