E3g751.teir – Rainbow Electronics DS3170 User Manual
Page 185
DS3170 DS3/E3 Single-Chip Transceiver
185 of 233
Register Name:
E3G751.TEIR
Register Description:
E3 G.751 Transmit Error Insertion Register
Register Address:
11Ah
Bit
# 15 14 13 12 11 10 9 8
Name
-- -- -- --
Reserved
Reserved
Reserved
Reserved
Default
0 0 0 0 0 0 0 0
Bit
# 7 6 5 4 3 2 1 0
Name Reserved Reserved Reserved FEIC1 FEIC0
FEI
TSEI MEIMS
Default
0 0 0 0 0 0 0 0
Bits 4 to 3: Framing Error Insert Control (FEIC[1:0]) – These two bits control the framing error event to be
inserted.
00 = single bit error in one frame.
01 = word error in one frame.
10 = single bit error in four consecutive frames.
11 = word error in four consecutive frames.
Bit 2: Framing Error Insertion Enable (FEI) – When 0, framing error insertion is disabled. When 1, framing error
insertion is enabled.
Bit 1: Transmit Single Error Insert (TSEI) – This bit causes an error of the enabled type(s) to be inserted in the
transmit data stream if manual error insertion is disabled (MEIMS = 0). A 0 to 1 transition causes a single error to
be inserted. For a second error to be inserted, this bit must be set to 0, and back to 1. Note: If MEIMS is low, and
this bit transitions more than once between error insertion opportunities, only one error will be inserted.
Bit 0: Manual Error Insert Mode Select (MEIMS) – When 0, error insertion is initiated by the TSEI register bit.
When 1, error insertion is initiated by the transmit manual error insertion signal (TMEI). Note: If TMEI or TSEI is
one, changing the state of this bit may cause an error to be inserted.