Rainbow Electronics DS3170 - Manual (Page 164)

DS3170 DS3/E3 Single-Chip Transceiver
164 of 233
Register Name: FEAC.TFDR
Register Description: Transmit FEAC Data Register
Register Address: 0C2h
Bit
# 15 14 13 12 11 10 9 8
Name -- -- TFCB5 TFCB4 TFCB3 TFCB2 TFCB1 TFCB0
Default 0 0 0 0 0 0 0 0
Bit
# 7 6 5 4 3 2 1 0
Name -- -- TFCA5 TFCA4 TFCA3 TFCA2 TFCA1 TFCA0
Default 0 0 0 0 0 0 0 0
Bits 13 to 8: Transmit FEAC Code B (TFCB[5:0]) – These six bits are the transmit FEAC code B data to be
stored inserted into codeword B. TFCB[5] is the LSB (last bit transmitted) of the FEAC code (C[6]), and TFCB[0] is
the MSB (first bit transmitted) of the FEAC code (C[1]).
Bits 5 to 0: Transmit FEAC Code A (TFCA[5:0]) – These six bits are the transmit FEAC code A data to be stored
inserted into codeword A. TFCA[5] is the LSB (last bit transmitted) of the FEAC code (C[6]), and TFCA[0] is the
MSB (first bit transmitted) of the FEAC code (C[1]).
Register Name:
FEAC.TSR
Register Description: FEAC Transmit Status Register
Register Address: 0C4h
Bit
# 15 14 13 12 11 10 9 8
Name -- -- -- -- -- -- -- --
Bit
# 7 6 5 4 3 2 1 0
Name -- -- -- -- -- -- -- TFI
Bit 0: Transmit FEAC Idle (TFI) – When 0, the Transmit FEAC processor is sending a FEAC codeword. When 1,
the Transmit FEAC processor is sending an Idle signal (all ones).
Register Name:
FEAC.TSRL
Register Description: FEAC Transmit Status Register Latched
Register Address: 0C6h
Bit
# 15 14 13 12 11 10 9 8
Name -- -- -- -- -- -- -- --
Bit
# 7 6 5 4 3 2 1 0
Name -- -- -- -- -- -- -- TFIL
Bit 0: Transmit FEAC Idle Latched (TFIL) – This bit is set when the TFI bit transitions from 0 to 1. Note:
Immediately after a reset, this bit will be set to one.