Rainbow Electronics DS3170 - Manual (Page 163)

DS3170 DS3/E3 Single-Chip Transceiver
163 of 233
11.7 FEAC Controller
11.7.1 FEAC Transmit Side Register Map
The transmit side utilizes five registers.
Table 11-18. FEAC Transmit Side Register Map
Address Register
Register Description
0C0h FEAC.TCR FEAC Transmit Control Register
0C2h FEAC.TFDR FEAC Transmit Data Register
0C4h FEAC.TSR FEAC Transmit Status Register
0C6h FEAC.TSRL FEAC Transmit Status Register Latched
0C8h FEAC.TSRIE FEAC Transmit Status Register Interrupt Enable
0CAh -- Unused
0CCh -- Unused
0CEh -- Unused
11.7.1.1 Register Bit Descriptions
Register Name:
FEAC.TCR
Register Description: FEAC Transmit Control Register
Register Address: 0C0h
Bit
# 15 14 13 12 11 10 9 8
Name -- -- -- -- -- -- -- --
Default 0 0 0 0 1 0 0 0
Bit
# 7 6 5 4 3 2 1 0
Name -- -- -- -- -- TFCL TFS1 TFS0
Default 0 0 0 0 0 0 0 0
Bit 2: Transmit FEAC Codeword Load (TFCL) – A 0 to 1 transition on this bit loads the transmit FEAC processor
mode select bits (TFS[1:0]), and transmit FEAC codes (TFCA[5:0] and TFCB[5:0]). Note: Whenever a FEAC
codeword is loaded, any current FEAC codeword transmission in progress will be immediately halted, and the new
FEAC codeword transmission will be started based on the new values for TFS[1:0], TFCA[5:0], and TFCB[5:0]..
Bits 1 to 0: Transmit FEAC Codeword Select (TFS[1:0]) – These two bits control the transmit FEAC processor
mode. The TFCL bit loads the mode set by this bit.
00 = Idle (all ones)
01 = single code (send code TFCA ten times and send all ones)
10 = dual code (send code TFCA ten times, send code TFCB ten times, and send all ones)
11 = continuous code (send code TFCA continuously)