E3g751.rsrl2, E3g751.rsrie1 – Rainbow Electronics DS3170 User Manual
Page 189
DS3170 DS3/E3 Single-Chip Transceiver
189 of 233
Register Name:
E3G751.RSRL2
Register Description:
E3 G.751 Receive Status Register Latched #2
Register Address:
12Ah
Bit
# 15 14 13 12 11 10 9 8
Name
-- -- -- --
Reserved Reserved Reserved FEL
Bit
# 7 6 5 4 3 2 1 0
Name
-- -- -- --
Reserved Reserved Reserved FECL
Bit 8: Framing Error Latched (FEL) – This bit is set when a framing error is detected.
Bit 0: Framing Error Count Latched (FECL) – This bit is set when the FEC bit transitions from zero to one.
Register Name:
E3G751.RSRIE1
Register Description:
E3 G.751 Receive Status Register Interrupt Enable #1
Register Address:
12Ch
Bit
# 15 14 13 12 11 10 9 8
Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved RUA1IE
Default
0 0 0 0 0 0 0 0
Bit
# 7 6 5 4 3 2 1 0
Name ACIE NCIE
COFAIE
LOFIE RDIIE AISIE
OOFIE
LOSIE
Default
0 0 0 0 0 0 0 0
Bit 8: Receive Unframed All 1’s Interrupt Enable (RUA1IE) – This bit enables an interrupt if the RUA1L bit is set
and the bit in
.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 7: A Bit Change Interrupt Enable (ACIE) – This bit enables an interrupt if the ACL bit is set and the bit in
.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 6: N Bit Change Interrupt Enable (NCIE) – This bit enables an interrupt if the NCL bit is set and the bit in
.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 5: Change Of Frame Alignment Interrupt Enable (COFAIE) – This bit enables an interrupt if the COFAL bit
and the bit in
.PSRIE[4:1] that corresponds to this port is set. set.
0 = interrupt disabled
1 = interrupt enabled
Bit 4: Loss Of Frame Interrupt Enable (LOFIE) – This bit enables an interrupt if the LOFL bit is set and the bit in
.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 3: Remote Alarm Indication Interrupt Enable (RDIIE) – This bit enables an interrupt if the RDIL bit is set and
the bit in
.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled