Bert.srl, Bert.srie – Rainbow Electronics DS3170 User Manual
Page 148
DS3170 DS3/E3 Single-Chip Transceiver
148 of 233
Register Name:
BERT.SRL
Register Description:
BERT Status Register Latched
Register Address:
06Eh
Bit
# 15 14 13 12 11 10 9 8
Name
-- -- -- -- -- -- -- --
Bit
# 7 6 5 4 3 2 1 0
Name
-- -- -- --
PMSL BEL BECL OOSL
Bit 3: Performance Monitoring Update Status Latched (PMSL) – This bit is set when the PMS bit transitions
from 0 to 1.
Bit 2: Bit Error Latched (BEL) – This bit is set when a bit error is detected.
Bit 1: Bit Error Count Latched (BECL) – This bit is set when the BEC bit transitions from 0 to 1.
Bit 0: Out Of Synchronization Latched (OOSL) – This bit is set when the OOS bit changes state.
Register Name:
BERT.SRIE
Register Description:
BERT Status Register Interrupt Enable
Register Address:
070h
Bit
# 15 14 13 12 11 10 9 8
Name
-- -- -- -- -- -- -- --
Default
0 0 0 0 0 0 0 0
Bit
# 7 6 5 4 3 2 1 0
Name
-- -- -- --
PMSIE
BEIE
BECIE
OOSIE
Default
0 0 0 0 0 0 0 0
Bit 3: Performance Monitoring Update Status Interrupt Enable (PMSIE) – This bit enables an interrupt if the
PMSL bit is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 2: Bit Error Interrupt Enable (BEIE) – This bit enables an interrupt if the BEL bit is set and the
.PSRIE bit is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 1: Bit Error Count Interrupt Enable (BECIE) – This bit enables an interrupt if the BECL bit is set and the
.PSRIE bit is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 0: Out Of Synchronization Interrupt Enable (OOSIE) – This bit enables an interrupt if the OOSL bit is set and
the
.PSRIE bit is set.
0 = interrupt disabled
1 = interrupt enabled