Lenze EVS9332xK - Manual (Page 44)

Function library
Function blocks
3.2.1 Table of function blocks
3−16
l
EDSVS9332K−EXT EN 4.0
Function block Used in basic configuration C0005 CPU time
[ ms]
Description Function block
12000 11000 10000 1000
CPU time
[ ms]
Description
NSET Speed setpoint conditioning ^ 3−220 70 ·
OR1 Logic OR, block 1
^ 3−226
6
·
OR2 Logic OR, block 2
OR3 Logic OR, block 3
OR4 Logic OR, block 4
OR5 Logic OR, block 5
OR6 Logic OR, block 6
8
OR7 Logic OR, block 7
OSC Oscilloscope function ^ 3−230 70
PCTRL1 Process controller ^ 3−234 58
PHADD1 32−bit addition block ^ 3−237 10
PHCMP1 Comparator
^ 3−238 8 PHCMP2 Comparator
PHCMP3 Comparator
PHDIFF1 32 bit setpoint/act. value comparison ^ 3−240 10
PHDIV1 Conversion ^ 3−241 8
PHINT1 Angle integrator
^ 3−242
7
PHINT2 Angle integrator
PHINT3 Angle integrator 10
PHINT4 Angle integrator 11
PHINT5 Master angle integrator ^ 3−249 60
PSAVE1 Position memory ^ 3−255 10 ·
PT1−1 1st order delay element ^ 3−257 8
PT1−2 1st order delay element ^ 3−258 16
CW/CCW/Q QSP / setpoint inversion ^ 3−260 8 ·
REFC Homing function ^ 3−261 100
RFG1 Ramp function generator ^ 3−268 16
RFGPH1 Ramp function generator for angle signals ^ 3−270 40
RFGPH2 Profile generator (ramp function generator for
angle signals)
^ 3−275
32
RFGPH3 Profile generator (ramp function generator for
angle signals) 16
S&H1 Sample and Hold ^ 3−281 4
SELPH1 Angle selection, block 1
^ 3−282 6
SELPH2 Angle selection, block 2
SPC1 Switch points
^ 3−284
80
SPC2 Switch points 130
SRFG1 S−shape ramp function generator ^ 3−290 15
STAT Output of digital status signals ^ 3−292 −
STATE−BUS Control of a drive network ^ 3−293 −
STORE1 Storage block 1 ^ 3−294 35
STORE2 Storage block 2 ^ 3−297 20
STORE3 Shift register ^ 3−298 10
SYNC1 Multi−axis positioning
^ 3−305
55
SYNC2 Multi−axis positioning 20
SWPH1 Angle changeover
^ 3−303 4
SWPH2 Angle changeover
SWPHD1 Digital frequency changeover switch
^ 3−304 4
SWPHD2 Digital frequency changeover switch
TRANS1 Binary edge evaluation
^ 3−314 7
TRANS2 Binary edge evaluation
TRANS3 Binary edge evaluation
TRANS4 Binary edge evaluation
VMAS1 Virtual master ^ 3−317 20