Avago Technologies LSI SAS 3041E-R - Manual (Page 20)

1-2 Fusion-MPT Device Management Product
Version 1.3 Copyright © 2001, 2002, 2007 by LSI Logic Corporation. All rights reserved.
1.1 Fusion-MPT Overview
Fusion-MPT architecture is the newest generation of I/O architecture
designed to deliver the highest performance available today.
The main elements of Fusion-MPT architecture are the Fusion-MPT
firmware architecture, the Fibre Channel and SCSI hardware
architecture, and the operating system level drivers that support these
architectures. Fusion-MPT architecture offers the unique feature of
having a single binary, operating system driver that supports both Fibre
Channel and SCSI devices now and other bus architectures in the future.
Figure 1.1 illustrates the Fusion-MPT architecture.
Figure 1.1 Fusion-MPT Architecture
The message passing interface defines the host interface used by all LSI
Common Architecture chipsets, such as the Fibre Channel LSIFC929,
LSIFC929X, LSIFC949X, LSIFC949E; the SCSI LSI53C1020,
LSI53C1030 chips; and the Serial Attached SCSI SAS1064, SAS1068,
SAS1068E, and SAS1078 RAID on-a-Chip (ROC). These chips use the
high-performance ARM
®
or PowerPC processor. Benefits of the ARM
processor include reduced host CPU utilization and a decreased number
of host interrupts per I/O. Using the Fusion-MPT architecture in all of its
Common Architecture Chipsets, the host does not need to know the
underlying bus protocol architecture to be able to communicate with the
target devices.
Fusion-MPT
Firmware Architecture
Fusion-MPT Fibre
Channel Architecture
Fusion-MPT
SCSI Architecture
Fusion-MPT
SAS/SATA Architecture
OS Device Drivers