Zilog Z16C30 User Manual
Page 8
Z16C30 USC
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Chapter 7 Interrupts
7.1
Introduction ....................................................................................................... 7-1
7.2
Interrupt Acknowledge Daisy-Chains ................................................................ 7-1
7.3
External Interrupt Control Logic ........................................................................ 7-2
7.4
Using /RxReq and /TxReq as Interrupt Requests ............................................. 7-3
7.5
Interrupt Types & Sources ................................................................................. 7-4
7.6
Internal Interrupt Operation ............................................................................... 7-6
7.7
Details of the Model ........................................................................................... 7-8
7.8
Interrupt Option in the BCR ............................................................................... 7-9
7.9
Interrupt Acknowledge Cycles .......................................................................... 7-9
7.10
Interrupt Acknowledge vs. Read Cycles ......................................................... 7-14
7.11
Interrupt Types ................................................................................................ 7-14
7.11.1 Receive Status Interrupt Sources and IA Bits ...................................... 7-14
7.11.2 Receive Data Interrupts ........................................................................ 7-15
7.11.3 Transmit Status Interrupt Sources and IA Bits ...................................... 7-18
7.11.4 Transmit Data Interrupts ....................................................................... 7-19
7.11.5 I/O Pin Interrupt Sources and IA Bits .................................................... 7-20
7.11.6 Miscellaneous Interrupt Sources and IA Bits ....................................... 7-20
7.12
Interrupt Pending and Under Service Bits ...................................................... 7-21
7.13
Interrupt Enable Bits ........................................................................................ 7-22
7.14
Channel Interrupt Options ............................................................................... 7-22
7.15
Interrupt Vectors .............................................................................................. 7-23
7.16
Software Requirements ................................................................................... 7-24
7.16.1 Nested Interrupts .................................................................................. 7-24
7.16.2 Which Type(s) to Handle? .................................................................... 7-24
7.16.3 Handling a Type ................................................................................... 7-25
7.16.4 Exiting the ISR ...................................................................................... 7-27
Chapter 8 Software Summary
8.1
Introduction ....................................................................................................... 8-1
8.2
About Resetting ................................................................................................. 8-1
8.3
Programming Order .......................................................................................... 8-2
8.4
Using DMA to Initialize a Channel ..................................................................... 8-2
8.5
Determining the Device Revision Level ............................................................. 8-3
8.6
Tips & Techniques ............................................................................................. 8-3
8.6.1 Common Hardware Problems ................................................................ 8-3
8.6.2 Common Software Problems .................................................................. 8-3
8.7
Test Modes ........................................................................................................ 8-6
8.8
Register Reference .......................................................................................... 8-10
8.8.1 Register Addresses .............................................................................. 8-10
8.8.2 Conditions/Context ............................................................................... 8-10
8.8.3 Description ........................................................................................... 8-10
8.8.4 RW Status ............................................................................................. 8-10
UM009402-0201