Zilog Z16C30 User Manual

Page 157

8-2

Z16C30 USC

SER

ANUAL

ILOG

UM97USC0100

8.3 PROGRAMMING ORDER

USC

family members aren’t as particular about the order

in which software programs their register fields as are the
members of Zilog’s SCC family. Still, initializing registers in
the wrong order can thoroughly confuse the USC’s internal
logic and make it do strange things. Always initialize the
USC in the following order:

Set the pin configurations in the IOCR. While it’s OK to
change the modes and even the direction of a signal
dynamically, it should be fairly obvious that if you’re
going to use pins in certain ways, they ought to be
pointing in the right direction before telling internal
logic to use them.

Select the clocking scheme in the CMCR and HCR.
(It’s OK to enable a BRG at this point if it’s only used for
clocking, but if it’s used for interrupts it’s probably best
to wait until later.)

Set up most or all of the other mode and control bits in
the Transmitter, Receiver, etc., but don’t enable any-
thing to run or operate until all of the basic modes and
controls are in place. This procedure avoids messy
interactions when one internal unit is trying to signal
another before the latter is ready to listen.

Set up the initial Interrupt Arm bits and Interrupt Enable
bits; it might be a good superstition to clear all the IP
and IUS bits after doing this.

Enable whichever units need to run and operate ini-
tially. Some units might not want to be enabled until
later, like enabling the Transmitter and Receiver after
a call is established.

Finally, set the Master Interrupt Enable (MIE) bit. In
general, you want to do this last so that interrupt
service routines can assume that everything’s set up
in its starting configuration.

8.4 USING DMA TO INITIALIZE A CHANNEL

Instead of software initializing a channel by writing the
various registers itself, it can initialize a channel’s external
Transmit DMA controller first and then use the DMA con-
troller to initialize the serial channel. To do this:

Initialize the transmit DMA controller, including giving
it the address of a sequence of bytes or 16-bit words
that will initialize the channel. If there’s only an 8-bit
bus, structure this string as a series of byte pairs. The
first byte of each pair goes into the LSByte of the
Channel Command /Address Register (CCAR) to iden-
tify the destination (register address) of the second
byte of the pair. If there’s a 16-bit bus, structure the
sequence as pairs of 16-bit words. The first word of
each pair goes into CCAR to identify the destination of
the second word of the pair.

Arrange the string/sequence to initialize the channel
registers in the order described in the previous sec-
tion. Make the

ChanLoad

bit (bit 7) of the first byte or

word of each pair be 1, except make it 0 in the last entry
of the sequence. If the RegAddr field in that last entry
is non-zero, that is, if it doesn’t point to the CCAR, the

USC will request that the DMA controller fetch the
second byte or word of the last pair and write it into the
indicated register before finishing the initializing op-
eration. If the RegAddr is zero, the USC will release
/TxREQ and stop without accessing a following byte or
word.

Program the DMA controller with the length of the
initializing string. This should include at least the first
byte or word of the last entry, and optionally the
second word or byte, as described above.

Start the DMA controller so that it will respond to the
channel’s /TxREQ output.

Write a “Trigger Channel Load DMA” command (hex
20) to the MSByte of the CCAR.

Assuming the processor is set up to grant use of the
bus to the DMA controller, the operation should com-
plete very quickly. This should be verified by checking
the DMA controller status.

UM009402-0201