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Hapter, Erial, Nterfacing – Zilog Z16C30 User Manual

Page 50

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4-1

Z16C30 USC

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M

ANUAL

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ILOG

UM97USC0100

4.1 INTRODUCTION

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ANUAL

C

HAPTER

4

S

ERIAL

I

NTERFACING

The USC

®

includes several serial interface options and

features that promote its usefulness in various kinds of
applications. It allows a variety of clocking schemes, and
will do serial encoding and decoding for NRZI and Biphase
formats that carry clocking information with the serial data.
The USC further supports such decoding with an on-chip

Digital Phase Locked Loop circuit. Finally, it provides I/O
lines that can be connected to modem control and status
signals, to other control and status lines related to the serial
link, or even to input and/or output signals that aren’t
related to the serial link at all.

4.2 SERIAL INTERFACE PIN DESCRIPTIONS

RxDA,B.

Received Data (inputs, positive logic). The serial

inputs for each channel.

TxDA,B.

Transmit Data (outputs, positive logic). The serial

outputs for each channel.

/RxCA,B.

Receive Clock (inputs or outputs). These signals

can be used as a clock input for any of the functional blocks
within each channel. Or, software can program a channel
so that this pin is an output carrying any of several receiver
or internal clock signals, a general-purpose input or out-
put, or an interrupt input.

/TxCA,B.

Transmit Clock (inputs or outputs). These sig-

nals can be used as a clock input for any of the functional
blocks within each channel. Or, software can program a
channel so that this pin is an output carrying any of several
transmitter or internal clock signals, a general-purpose
input or output, or an interrupt input.

/RxREQA,B.

Receive DMA Request (inputs or outputs).

These pins can carry a low-active DMA Request from each
channel’s receive FIFO. If DMA transfers aren’t used for a
channel’s receiver, its RxREQ pin can be used as a
general-purpose input or output, or as an interrupt input.

/TxREQA,B.

Transmit DMA Request (inputs or outputs).

These pins can carry a low-active DMA Request from each
channel’s transmit FIFO. If DMA transfers aren’t used for a
channel’s transmitter, its TxREQ pin can be used as a
general-purpose input or output, or as an interrupt input.

/RxACKA,B.

Receive DMA Acknowledge (inputs or out-

puts). If an external “flyby” DMA controller is being used for
a channel’s received data, this pin carries the low-active
Acknowledge signal from the DMA controller. If DMA
transfers aren’t used for a channel’s receiver, or if the DMA
controller uses flow-through (two-cycle) rather than flyby
operation, that channel’s RxACK pin can be used as a
general-purpose input or output.

/TxACKA,B.

Transmit DMA Acknowledge (inputs or out-

puts). If an external “flyby” DMA controller is being used for
a channel’s transmit data, this pin carries the low-active
Acknowledge signal from the DMA controller. If DMA
transfers aren’t used for a channel’s receiver, or if the DMA
controller uses flow-through (two-cycle) rather than flyby
operation, that channel’s TxACK pin can be used as a
general-purpose input or output.

/DCDA,B.

Data Carrier Detect (inputs or outputs, active

low). Software can program a channel so that this signal
enables/disables its receiver. In addition or instead, soft-
ware can program a channel to request interrupts in
response to transitions on this line. The pins can also be
used as simple inputs or outputs.

/CTSA,B.

Clear to Send (inputs or outputs, active low).

Software can program a channel so that this signal en-
ables/disables its transmitter. In addition or instead, soft-
ware can program a channel to request interrupts in
response to transitions on this line. The pins can also be
used as simple inputs or outputs.

UM009402-0201