Zilog Z16C30 User Manual
Page 186
8-31
Z16C30 USC
®
U
SER
'
S
M
ANUAL
Z
ILOG
UM97USC0100
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
Test Register selected by TMCR4-0
Test Mode Data Register (TMDR)
Register Address 0 b 00100
Bit(s)
Field/Bit
Name
Conditions
/Context
Description
RW
Status
Ref Chapter: Section
TMDR15-0
Test register selected by TMCR4-0
RO or
WO
8: Test Modes
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
Divisor for (or current count in) Baud Rate Generator 0
Test Constant 0 Register (TC0R)
Register Address 0 b 10111
Bit(s)
Field/Bit
Name
Conditions
/Context
Description
RW
Status
Ref Chapter: Section
TC0R15-0
divisor/starting value for BRG0:
0=input=output; 1=divide by 2;
n=divide by n+1
RW
5: DMA Support Features:
The Character Counters
Write, or
Read w/
TC0RSel
(RICR0)=0
Value of BRG0 counter last time TC0RSel:=1
RO
Read w/
TC0RSel
(RICR0)=1
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
Divisor for (or current count in) Baud Rate Generator 1
Test Constant 1 Register (TC1R)
Register Address 0 b 11111
Bit(s)
Field/Bit
Name
Conditions
/Context
Description
RW
Status
Ref Chapter: Section
TC1R15-0
divisor/starting value for BRG1:
0=input=output; 1=divide by 2;
n=divide by n+1
RW
5: DMA Support Features:
The Character Counters
Write, or
Read w/
TC1RSel
(TICR0)=0
Value of BRG1 counter last time TC1RSel:=1
RO
Read w/
TC1RSel
(TICR0)=1
RW = Read/Write, RO = Read Only, WO = Write Only – for other codes see p. 8-10.
UM009402-0201