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1 transmit-signaling operation, 1 processor-based transmit signaling, 2 time slot numbering schemes – Rainbow Electronics DS26519 User Manual

Page 65: 3 hardware-based transmit signaling

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DS26519 16-Port T1/E1/J1 Transceiver

65 of 310

9.9.4.1 Transmit-Signaling Operation

There are two methods to provide transmit-signaling data. These are processor based (i.e., software based) or
hardware based. Processor-based refers to access through the transmit signaling registers,

TS1

–TS16, while

hardware based refers to using the TSIGn pins. Both methods can be used simultaneously.

9.9.4.1.1 Processor-Based Transmit Signaling

In processor-based mode, signaling data is loaded into the transmit-signaling registers (

TS1

–TS16) via the host

interface. On multiframe boundaries, the contents of these registers are loaded into a shift register for placement in
the appropriate bit position in the outgoing data stream. The user can utilize the transmit multiframe interrupt in the
Transmit Latched Status Register 1 (

TLS1

.2) to know when to update the signaling bits. The user need not update

any transmit signaling register for which there is no change of state for that register.

Each transmit-signaling register contains the robbed-bit signaling (

TCR1

.4 in T1 mode) or TS16 CAS signaling

(

TCR1

.6 in E1 mode) for one time slot that will be inserted into the outgoing stream. Signaling data can be sourced

from the TS registers on a per-channel basis by using the Software Signaling Insertion Enable Registers,

SSIE1

–4.

In T1 ESF framing mode, there are four signaling bits per channel (A, B, C, and D). TS1–TS12 contain a full
multiframe of signaling data. In T1 D4 framing mode, there are only two signaling bits per channel (A and B). In T1
D4 framing mode, the framer uses A and B bit positions for the next multiframe. The C and D bit positions become
‘don’t care’ in D4 mode.

In E1 mode, TS16 carries the signaling information. This information can be in either CCS (Common Channel
Signaling) or CAS (Channel Associated Signaling) format. The 32 time slots are referenced by two different
channel number schemes in E1. In “channel” numbering, TS0–TS31 are labeled channels 1 through 32. In “Phone
Channel” numbering TS1–TS15 are labeled channel 1 to channel 15 and TS17–TS31 are labeled channel 15 to
channel 30.

9.9.4.1.2 Time Slot Numbering Schemes

TS

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

24

25

26

27 28 29 30 31

Channel

1 2 3 4 5 6 7 8 9 10

11 12 13 14 15 16 17 18 19 20 21 22 23 24

25

26

27

28 29 30 31 32

Phone
Channel

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

16 17 18 19 20 21 22

23

24

25

26 27 28 29 30

9.9.4.1.3 Hardware-Based Transmit Signaling

In hardware-based mode, signaling data is input via the TSIGn pin. This signaling PCM stream is buffered and
inserted to the data stream being input at the TSERn pin.

Signaling data may be input via the Transmit Hardware-Signaling Channel Select Register (

THSCS1

) function. The

framer can be set up to take the signaling data presented at the TSIGn pin and insert the signaling data into the
PCM data stream that is being input at the TSERn pin. The user can control which channels are to have signaling
data from the TSIGn pin inserted into them on a per-channel basis. The signaling insertion capabilities of the
framer are available whether the transmit-side elastic store is enabled or disabled. If the elastic store is enabled,
the backplane clock (TSYSCLKn) can be either 1.544MHz or 2.048MHz.