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Table 10-13. ds26519 gpio control (9 to 16), Gpsel[3:0] and, Gtcr2 – Rainbow Electronics DS26519 User Manual

Page 132

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DS26519 16-Port T1/E1/J1 Transceiver

132 of 310

Register Name

GTCR2

Register Description:

Global Transceiver Control Register 2

Register Address:

20F0h

Channels:

9 to 16


Bit

# 7 6 5 4 3 2 1 0

Name

GPSEL3 GPSEL2 GPSEL1 GPSEL0

GIBO

GCLE

GIPI

Default

0 0 0 0 0 0 0 0

Bits 7 to 5: General-Purpose I/O Pins Select (GPSEL[3:1]). GPSEL0 must be set to 1 to output this selection.

Table 10-13. DS26519 GPIO Control (9 to 16)

GPSEL[3:1] GPIO[16:9]

OUTPUT

000 RLOFn
001 LOTCn
010 RSIGFn
011 FLOSn
100 ALOSn
101

Logic 0—All 8 GPIOs

110

Logic 1—All 8 GPIOs

111 Reserved

Bit 3: GPIO Select 0 (GPSEL0)

0 = GPIO16:9] are inputs.

1 = GPIO[16:9] are outputs selected by GPSEL[3:1].

Bit 2: Ganged IBO Enable (GIBO). This bit is used to select either the internal mux for IBO operation or an
external “wire-OR” operation. Normally this bit should be set = 0 and the internal mux used.

0 = Use internal IBO mux.

1 = Externally “wire-OR” TSERn and RSERn for IBO operation.

Note: Setting GIBO disables the internal IBO mux.

GFCR2

must be set to inform the framers of the IBO

configuration.

Bit 1: Global Counter Latch Enable (GCLE). A low-to-high transition on this bit will, when enabled, latch the
framer performance monitor counters. Each framer can be independently enabled to accept this input. This bit must
be cleared and set again to perform another counter latch.

Bit 0: Global Interrupt Pin Inhibit (GIPI)

0 = Normal Operation. Interrupt pin (

INTB) will toggle low on an unmasked interrupt condition.

1 = Interrupt Inhibit. Interrupt pin (

INTB) is forced high (inactive) when this bit is set.