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Blsr, To further id, To determine – Rainbow Electronics DS26519 User Manual

Page 266: Status bit in the

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DS26519 16-Port T1/E1/J1 Transceiver

266 of 310

Register Name:

BLSR

Register Description:

BERT Latched Status Register

Register Address:

110Eh + (10h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16


Bit

# 7 6 5 4 3 2 1 0

Name — BBED

BBCO

BECO

BRA1

BRA0

BRLOS

BSYNC

Default

0 0 0 0 0 0 0 0

Note: All bits in this register are latched and can create interrupts.


Bit 6: BERT Bit Error Detected Event (BBED). A latched bit that is set when a bit error is detected. The receive
BERT must be in synchronization for it to detect bit errors.

Bit 5: BERT Bit Counter Overflow Event (BBCO). A latched bit that is set when the 32-bit BERT bit counter
(BBC) overflows.

Bit 4: BERT Error Counter Overflow Event (BECO). A latched bit that is set when the 24-bit BERT error counter
(BEC) overflows.

Bit 3: BERT Receive All-Ones Condition (BRA1). A latched bit that is set when 32 consecutive ones are
received.

Bit 2: BERT Receive All-Zeros Condition (BRA0). A latched bit that is set when 32 consecutive zeros are
received.

Bit 1: BERT Receive Loss of Synchronization Condition (BRLOS). A latched bit that is set whenever the
receive BERT begins searching for a pattern.

Bit 0: BERT in Synchronization Condition (BSYNC). Will be set when the incoming pattern matches for 32
consecutive bit positions.