Dram cas-before-ras refresh cycle, Dram self-refresh cycle, Burst rom read cycle – Epson S1C33210 User Manual
Page 97
8 ELECTRICAL CHARACTERISTICS
S1C33210 PRODUCT PART
EPSON
A-83
DRAM CAS-before-RAS refresh cycle
BCLK
#RAS
#HCAS/
#LCAS
#WE
CBR refresh cycle
C
CBR1
C
CBR2
C
CBR3
t
RASD2
t
RASD1
t
CASD2
t
CASD1
;;;;;;;;
;;;;;;;;
;;;;;;
;;;;;;
;;;;;;;;
;;;;;;;;
;;;;;;
;;;;;;
DRAM self-refresh cycle
BCLK
#RAS
#HCAS/
#LCAS
Self-refresh mode setup
Self-refresh mode
t
CASD2
;;;;;;;
;;;;;;;
;;;;
;;;;
Self-refresh mode canceration
t
RASD2
t
RASD1
t
CASD1
6-cycle precharge
(Fixed)
Burst ROM read cycle
BCLK
A[23:2]
A[1:0]
#CEx
#RD
D[15:0]
SRAM read cycle
Burst cycle
Burst cycle
Burst cycle
t
AD
t
AD
t
AD
t
RDS
t
RDAC2
t
CEAC
t
RDH
t
CE2
t
CE1
t
RDD2
t
RDD1
;;;;;
;;;;;
t
AD
t
AD
t
AD
t
AD
t
ACC2
t
RDS
t
RDH
;;;;;
;;;;;
t
ACCB
t
RDS
t
RDH
;;;;;
;;;;;
t
ACCB
t
RDS
t
RDH
;;;;;
;;;;;
t
ACCB
∗
1
∗
1
t
RDH
is measured with respect to the first signal change (negation) from among the #RD, #CEx and A[23:0]
signals.