Epson S1C33210 - Manual (Page 285)

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERS
S1C33210 FUNCTION PART EPSON B-III-4-19
CFP16–CFP10: P1[6:0] pin function selection (D[6:0]) / P1 function select register (0x402D4)
Selects the pin to be used for input of an external count clock to the timer.
Write "1": Clock input pin
Write "0": I/O port pin
Read: Valid
Select clock input pins for the timers that are used as an event counter from among P10 through P16, by writing "1" to
CFP10–CFP16. For the relationship between each pin and timer, refer to Table 4.1. The pin is set for an I/O port by
writing "0" to CFP1x.
In addition to pin selection here, the pin to be used for clock input to the 16-bit programmable timer must be set to
input mode using the I/O control register.
At cold start, CFP1x is set to "0" (I/O port). At hot start, CFP1x retains its status from prior to the initial reset.
CFP27–CFP22: P2[7:2] pin function selection (D[7:2]) / P2 function select register (0x402D8)
Selects the pin used for clock output.
Write "1": Clock output pin
Write "0": I/O port pin
Read: Valid
Select the pin to be used to output a timer-generated clock to external devices from among P22 through P27, by
writing "1" to CFP22–CFP27. For the relationship between each pin and timer, refer to Table 4.1. The pin is set for
an I/O port by writing "0" to CFP2x.
At cold start, CFP2x is set to "0" (I/O port). At hot start, CFP2x retains its status from prior to the initial reset.
CFEX1: P10, P11, P13 port extended function (D1) / Port function extension register (0x402DF)
CFEX0: P12, P14 port extended function (D0) / Port function extension register (0x402DF)
Sets whether the function of an I/O-port pin is to be extended.
Write "1": Function-extended pin
Write "0": I/O-port/peripheral-circuit pin
Read: Valid
When CFEX[1:0] is set to "1", the P14–P10 ports function as debug signal output ports. When CFEX[1:0] = "0", the
CFP1[4:0] bit becomes effective, so the settings of these bits determine whether the P14–P10 ports function as I/O
port s or external clock input ports.
At cold start, CFEX[1:0] is set to "1" (function-extended pins). At hot start, CFEX[1:0] retains its state from prior to
the initial reset.
IOC16–IOC10: P1[6:0] port I/O control (D[6:0]) / P1 I/O control register (0x402D6)
Directs P10 through P16 for input or output.
Write "1": Output mode
Write "0": Input mode
Read: Valid
For the pin selected from among P10 through P16 for use for external clock input, write "0" to the corresponding I/O
control bit to set it to input mode . If the pin is set to output mode, even though its CFP1x may be set to "1", it
functions as the output pin of an 8-bit programmable timer and cannot be used to receive an external clock.
At cold start, all IOC1x is set to "0" (input mode). At hot start, IOC1x retains its state from prior to the initial reset.