Epson S1C33210 - Manual (Page 311)

III PERIPHERAL BLOCK: CLOCK TIMER
S1C33210 FUNCTION PART EPSON B-III-7-7
I/O Memory of Clock Timer
Table 7.5 shows the control bits of the clock timer.
Table 7.5 Control Bits of Clock Timer
Name Address Register name Bit Function Setting Init. R/W Remarks
–
TCRST
TCRUN
D7–2
D1
D0
reserved
Clock timer reset
Clock timer Run/Stop control
–
X
X
–
W
R/W
0 when being read.
0 when being read.
0040151
(B) 1 Reset 0 Invalid
1 Run 0 Stop
– Clock timer
Run/Stop
register
TCISE2
TCISE1
TCISE0
TCASE2
TCASE1
TCASE0
TCIF
TCAF
D7
D6
D5
D4
D3
D2
D1
D0
Clock timer interrupt factor
selection
Clock timer alarm factor selection
Interrupt factor generation flag
Alarm factor generation flag
X
X
X
X
X
X
X
X
R/W
R/W
R/W
R/W
Reset by writing 1.
Reset by writing 1.
0040152
(B)
1 Generated 0 Not generated
1 Generated 0 Not generated
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
TCISE[2:0] Interrupt factor
None
Day
Hour
Minute
1 Hz
2 Hz
8 Hz
32 Hz
1
X
X
0
X
1
X
0
X
X
1
0
TCASE[2:0] Alarm factor
Day
Hour
Minute
None
Clock timer
interrupt
control register
TCD7
TCD6
TCD5
TCD4
TCD3
TCD2
TCD1
TCD0
D7
D6
D5
D4
D3
D2
D1
D0
Clock timer data 1 Hz
Clock timer data 2 Hz
Clock timer data 4 Hz
Clock timer data 8 Hz
Clock timer data 16 Hz
Clock timer data 32 Hz
Clock timer data 64 Hz
Clock timer data 128 Hz
X
X
X
X
X
X
X
X
R
R
R
R
R
R
R
R
0040153
(B)
1 High 0 Low
1 High 0 Low
1 High 0 Low
1 High 0 Low
1 High 0 Low
1 High 0 Low
1 High 0 Low
1 High 0 Low
Clock timer
divider register
–
TCMD5
TCMD4
TCMD3
TCMD2
TCMD1
TCMD0
D7–6
D5
D4
D3
D2
D1
D0
reserved
Clock timer second counter data
TCMD5 = MSB
TCMD0 = LSB
–
X
X
X
X
X
X
–
R
0 when being read. 0040154
(B)
–
0 to 59 seconds
Clock timer
second
register
–
TCHD5
TCHD4
TCHD3
TCHD2
TCHD1
TCHD0
D7–6
D5
D4
D3
D2
D1
D0
reserved
Clock timer minute counter data
TCHD5 = MSB
TCHD0 = LSB
–
X
X
X
X
X
X
–
R/W
0 when being read. 0040155
(B)
–
0 to 59 minutes
Clock timer
minute register
0 to 23 hours
–
TCDD4
TCDD3
TCDD2
TCDD1
TCDD0
D7–5
D4
D3
D2
D1
D0
reserved
Clock timer hour counter data
TCDD4 = MSB
TCDD0 = LSB
–
X
X
X
X
X
–
R/W
0 when being read. 0040156
(B)
Clock timer
hour register
–
0 to 65535 days
(low-order 8 bits)
TCND7
TCND6
TCND5
TCND4
TCND3
TCND2
TCND1
TCND0
D7
D6
D5
D4
D3
D2
D1
D0
Clock timer day counter data
(low-order 8 bits)
TCND0 = LSB
X
X
X
X
X
X
X
X
R/W 0040157
(B)
Clock timer
day (low-order)
register
0 to 65535 days
(high-order 8 bits)
X
X
X
X
X
X
X
X
R/W TCND15
TCND14
TCND13
TCND12
TCND11
TCND10
TCND9
TCND8
D7
D6
D5
D4
D3
D2
D1
D0
Clock timer day counter data
(high-order 8 bits)
TCND15 = MSB
0040158
(B)
Clock timer
day (high-
order) register