Epson S1C33210 - Manual (Page 111)

APPENDIX A EXTERNAL DEVICE INTERFACE TIMINGS
S1C33210 PRODUCT PART EPSON A-97
DRAM: 60ns, CPU: 33MHz, random read/write cycle
2
RAS cycle CAS cycle RAS precharge
2
t RC
t RAD
t
RAH
t
RCD
t RAC
t OAC
t AA
t
CAC
t
OFF
t
CAS
t
ASC
t RAS t ASR
t WP
t RP
2
BCLK
A[11:0]
#RAS
#CAS
#RD
D[15:0](RD)
#WE
D[15:0](WR)
ROW #1
RD data
;;;;;;;;;
;;;;;;;;;
ROW #2
;;;;;
;;;;;
;;;;
;;;;
t DH t DS
WR data
;;;
;;;
COL #1
DRAM: 60ns, CPU: 33MHz, page-mode read/write cycle
2
RAS cycle CAS cycle RAS precharge
2
CAS cycle
2
t
PC
t ACP
t CP
t
RAS
2
BCLK
A[11:0]
#RAS
#CAS
#RD
D[15:0](RD)
#WE
D[15:0](WR)
ROW #1
RD data
;;;;;;
;;;;;;
;;;;;
;;;;;
RD data
;;;;;
;;;;;
WR data
;;;
;;;
WR data
COL #1 COL #2
DRAM: 60ns, CPU: 33MHz, CAS-before-RAS refresh cycle
1 1
RPC delay Fixed Refresh RAS pulse width
3
RAS precharge
2
t RPC t CSR t CHR
t RAS
BCLK
#RAS
#CAS