Epson S1C33210 - Manual (Page 358)

III PERIPHERAL BLOCK: SERIAL INTERFACE
B-III-8-42 EPSON S1C33210 FUNCTION PART
RSRX0, RSTX0: Ch.0 IDMA request (D6, D7) /
16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA request register (0x40292)
RSRX1, RSTX1: Ch.1 IDMA request (D0, D1) / Serial I/F Ch.1, A/D IDMA request register (0x40293)
Specifies whether to invoke IDMA when an interrupt factor occurs.
When using the set-only method (default)
Write "1": IDMA request
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA request
Write "0": Interrupt request
Read: Valid
The RSRXx and RSTXx bits are IDMA request bits corresponding to receive-buffer full and transmit-buffer empty
interrupt factors, respectively. If the bit is set to "1", IDMA is invoked when an interrupt factor occurs, thus
performing a programmed data transfer. If this bit is set to "0", normal interrupt processing is performed, without
invoking IDMA.
For details on IDMA, refer to "IDMA (Intelligent DMA)".
At initial reset, these bits are set to "0" (interrupt request).
DESRX0, DESTX0: Ch.0 IDMA enable (D6, D7) /
16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA enable register (0x40296)
DESRX1, DESTX1: Ch.1 IDMA enable (D0, D1) / Serial I/F Ch.1, A/D IDMA enable register (0x40297)
Enables IDMA transfer by means of an interrupt factor.
When using the set-only method (default)
Write "1": IDMA enabled
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA enabled
Write "0": IDMA disabled
Read: Valid
The DESRXx and DESTXx bits are IDMA enable bits corresponding to receive-buffer full and transmit-buffer
empty interrupt factors, respectively. If the bit is set to "1", the IDMA request by the interrupt factor is enabled. If
the bit is set to "0", the IDMA request is disabled.
At initial reset, these bits are set to "0" (IDMA disabled).
SIO2ES0: SIO Ch.2 receive error/FP0 interrupt factor switching
(D0) /Interrupt factor FP function switching register (0x402C5)
Switches the interrupt factor.
Write "1": SIO Ch.2 receive error
Write "0": FP0 input
Read: Valid
Set to "1" to use the SIO Ch.2 receive error interrupt.
Set to "0" to use the FP0 input interrupt.
At power-on, this bit is set to "0".