Epson S1C33210 - Manual (Page 141)

II CORE BLOCK: INTRODUCTION
S1C33210 FUNCTION PART EPSON B-II-1-1
II-1 INTRODUCTION
The core block consists of a functional block C33_CORE including CPU, BCU (Bus Control Unit), ITC (Interrupt
Controller), CLG (Clock Generator) and DBG (Debug Unit), an I/O pad block for external interface, and an SBUS
(Internal Silicon Integration Bus) for interfacing with on-chip Peripheral Macro Cells.
CORE_PAD
Pads
C33_SBUS
Internal RAM
(Area 0)
C33 Core Block
C33 Internal Memory Block C33 DMA Block
PERI_PAD
Pads
C33_PERI
(Prescaler, 8-bit timer, 16-bit timer,
Clock timer, Serial interface,
Mobile access interface, Ports)
C33 Peripheral Block C33 Analog Block
C33_CORE
(CPU, BCU, ITC, CLG, DBG)
C33_ADC
(A/D converter)
C33_DMA
(IDMA, HSDMA)
Figure 1.1 Core Block