Epson S1C33210 User Manual

Page 135

I OUTLINE: LIST OF PINS

S1C33210 FUNCTION PART

EPSON

B-I-3-3

Table 3.3 List of Pins for Internal Peripheral Circuits

Pin name

I/O

Pull-up

Function

K52

#ADTRG

Pull-up K52:

Input port when CFK52(D2/0x402C0) = "0" (default)

#ADTRG:

A/D converter trigger input when CFK52(D2/0x402C0) = "1"

K60

AD0

–

K60:

Input port when CFK60(D0/0x402C3) = "0" (default)

AD0:

A/D converter Ch. 0 input when CFK60(D0/0x402C3) = "1"

K61

AD1

–

K61:

Input port when CFK61(D1/0x402C3) = "0" (default)

AD1:

A/D converter Ch. 1 input when CFK61(D1/0x402C3) = "1"

K62

AD2

–

K62:

Input port when CFK62(D2/0x402C3) = "0" (default)

AD2:

A/D converter Ch. 2 input when CFK62(D2/0x402C3) = "1"

K63

AD3

–

K63:

Input port when CFK63(D3/0x402C3) = "0" (default)

AD3:

A/D converter Ch. 3 input when CFK63(D3/0x402C3) = "1"

P00

SIN0

I/O

–

P00:

I/O port when CFP00(D0/0x402D0) = "0" (default)

SIN0:

Serial I/F Ch. 0 data input when CFP00(D0/0x402D0) = "1"

P01

SOUT0

I/O

–

P01:

I/O port when CFP01(D1/0x402D0) = "0" (default)

SOUT0:

Serial I/F Ch. 0 data output when CFP01(D1/0x402D0) = "1"

P02

#SCLK0

I/O

–

P02:

I/O port when CFP02(D2/0x402D0) = "0" (default)

#SCLK0:

Serial I/F Ch. 0 clock input/output when CFP02(D2/0x402D0) = "1"

P03

#SRDY0

I/O

–

P03:

I/O port when CFP03(D3/0x402D0) = "0" (default)

#SRDY0:

Serial I/F Ch. 0 ready signal input/output when CFP03(D3/0x402D0) = "1"

P04

SIN1

I/O

–

P04:

I/O port when CFP04(D4/0x402D0) = "0" and CFEX4(D4/0x402DF) = "0" (default)

SIN1:

Serial I/F Ch. 1 data input when CFP04(D4/0x402D0) = "1" and CFEX4(D4/0x402DF) = "0"

P05

SOUT1

I/O

–

P05:

I/O port when CFP05(D5/0x402D0) = "0" and CFEX5(D5/0x402DF) = "0"(default)

SOUT1:

Serial I/F Ch. 1 data output when CFP05(D5/0x402D0) = "1" and CFEX5(D5/0x402DF) = "0"

P10

EXCL0

T8UF0

DST0

I/O

–

P10:

I/O port when CFP10(D0/0x402D4) = "0" and CFEX1(D1/0x402DF) = "0"

EXCL0:

16-bit timer 0 event counter input when CFP10(D0/0x402D4) = "1", IOC10(D0/0x402D6) = "0"

and CFEX1(D1/0x402DF) = "0"

T8UF0:

8-bit timer 0 output when CFP10(D0/0x402D4) = "1", IOC10(D0/0x402D6) = "1" and

CFEX1(D1/0x402DF) = "0"

DST0:

DST0 signal output when CFEX1(D1/0x402DF) = "1" (default)

P11

EXCL1

T8UF1

DST1

I/O

–

P11:

I/O port when CFP11(D1/0x402D4) = "0" and CFEX1(D1/0x402DF) = "0"

EXCL1:

16-bit timer 1 event counter input when CFP11(D1/0x402D4) = "1", IOC11(D1/0x402D6) = "0"

and CFEX1(D1/0x402DF) = "0"

T8UF1:

8-bit timer 1 output when CFP11(D1/0x402D4) = "1", IOC11(D1/0x402D6) = "1" and

CFEX1(D1/0x402DF) = "0"

DST1:

DST1 signal output when CFEX1(D1/0x402DF) = "1" (default)

P12

EXCL2

T8UF2

DST2

I/O

–

P12:

I/O port when CFP12(D2/0x402D4) = "0" and CFEX0(D0/0x402DF) = "0"

EXCL2:

16-bit timer 2 event counter input when CFP12(D2/0x402D4) = "1", IOC12(D2/0x402D6) = "0"

and CFEX0(D0/0x402DF) = "0"

T8UF2:

8-bit timer 2 output when CFP12(D2/0x402D4) = "1", IOC12(D2/0x402D6) = "1" and

CFEX0(D0/0x402DF) = "0"

DST2:

DST2 signal output when CFEX0(D0/0x402DF) = "1" (default)

P13

EXCL3

T8UF3

DPCO

I/O

–

P13:

I/O port when CFP13(D3/0x402D4) = "0" and CFEX1(D1/0x402DF) = "0"

EXCL3:

16-bit timer 3 event counter input when CFP13(D3/0x402D4) = "1", IOC13(D3/0x402D6) = "0"

and CFEX1(D1/0x402DF) = "0"

T8UF3:

8-bit timer 3 output when CFP13(D3/0x402D4) = "1", IOC13(D3/0x402D6) = "1" and

CFEX1(D1/0x402DF) = "0"

DPCO:

DPCO signal output when CFEX1(D1/0x402DF) = "1" (default)

P14

FOSC1

DCLK

I/O

–

P14:

I/O port when CFP14(D4/0x402D4) = "0" and CFEX0(D0/0x402DF) = "0"

FOSC1:

OSC1 clock output when CFP14(D4/0x402D4) = "1" and CFEX0(D0/0x402DF) = "0"

DCLK:

DCLK signal output when CFEX0(D0/0x402DF) = "1" (default)

P15

EXCL4

#DMAEND0

I/O

–

P15:

I/O port when CFP15(D5/0x402D4) = "0" (default)

EXCL4:

16-bit timer 4 event counter input when CFP15(D5/0x402D4) = "1" and IOC15(D5/0x402D6)

= "0"

#DMAEND0: HSDMA Ch. 0 end-of-transfer signal output when CFP15(D5/0x402D4) = "1" and

IOC15(D5/0x402D6) = "1"