Epson S1C33210 - Manual (Page 498)

V DMA BLOCK: IDMA (Intelligent DMA)
B-V-3-10 EPSON S1C33210 FUNCTION PART
Block transfer mode
The channels for which DMOD in control information is set to "10" operate in block transfer mode. In this
mode, a transfer operation invoked by one trigger is completed after transferring one block of data of the size
set by BLKLEN. If a block transfer needs to be performed a number of times as set by the transfer counter, an
equal number of triggers are required.
The operation of IDMA in block transfer mode is shown by the flow chart in Figure 3.3.
START
END
Calculates address of
control information
Loads channel
control information
Transfers one unit of data
Block size - 1
Restores initial values to
block size and address ∗
IDMA interrupt processing
(if interrupt is enabled)
Block
size = 0
A
Base address + (Channel number
×
12)
B (3 words)
C (Data read from source of transfer)
D (Data write to destination of transfer)
E
1-block transfer
F
G
N
Trigger
Y
A B1 B2 B3 C1 D1 E1 Cn Dn En
F G
H1 H2 H3
Transfer counter - 1
Saves channel
control information
Transfer
counter = 0
H (3 words)
N
Y
∗ : according to SRINC/DSINC
settings
Figure 3.3 Operation Flow in Block Transfer Mode
(1) When a trigger is accepted, the address for control information is calculated from the base address and
channel number.
(2) Control information is read from the calculated address into the internal temporary register.
(3) Data of the size set in the control information is read from the source address.
(4) The read data is written to the destination address.
(5) The address is incremented or decremented and BLKLEN is decremented.
(6) Steps (3) to (5) are repeated until BLKLEN reaches 0.
(7) If SRINC and DSINC are "10", the address is recycled to the initial value.
(8) The transfer counter is decremented.
(9) The modified control information is written to RAM.
(10) In the case of a hardware trigger, the interrupt control bits are processed before completing IDMA.
Condition Interrupt factor flag IDMA request bit IDMA enable bit
Transfer counter
≠
"0": Reset ("0") Not changed ("1") Not changed ("1")
Transfer counter = "0", DINTEN = "1": Not changed ("1") Reset ("0") Not changed ("1")
Transfer counter = "0", DINTEN = "0": Reset ("0") Not changed ("1") Reset ("0")