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DS4830 User’s Guide
3
7.1.3
– Temperature Conversion ................................................................................................................................... 48
7.1.4
– Sample and Hold Conversion ............................................................................................................................ 48
7.1.5
– ADC Frame Sequence ....................................................................................................................................... 48
7.1.6
– ADC Conversion Time ....................................................................................................................................... 49
7.1.7
– Location Override............................................................................................................................................... 50
7.1.8
– ADC Data Reading ............................................................................................................................................ 50
7.1.9
– ADC Interrupts ................................................................................................................................................... 51
7.1.10
– ADC Internal Offset .......................................................................................................................................... 51
7.2
– ADC Register Descriptions ....................................................................................................................................... 52
7.3
–ADC Code Examples ................................................................................................................................................. 58
SECTION 8
– SAMPLE AND HOLD ..................................................................................................................................... 60
8.1
– Detailed Description ................................................................................................................................................. 60
8.1.1
– Operation ........................................................................................................................................................... 60
8.1.2
– Fast Mode Operation ......................................................................................................................................... 61
8.1.3
– Sampling Control ............................................................................................................................................... 61
8.1.4
– Pin Capacitance Discharge ............................................................................................................................... 63
8.1.5
– Sample and Hold Data Reading ........................................................................................................................ 64
8.1.6
– Sample and Hold Interrupts ............................................................................................................................... 64
8.2
– Sample and Hold Register Descriptions ................................................................................................................... 65
SECTION 9
– QUICK TRIP (FAST COMPARATOR) ........................................................................................................... 68
9.1
– Detailed Description ................................................................................................................................................. 68
9.1.1
– Quick Trip List Sequencing ................................................................................................................................ 69
9.1.2
– Operation ........................................................................................................................................................... 69
9.1.3
– Quick Trip Interrupts .......................................................................................................................................... 71
9.2
– Quick Trip Register Descriptions .............................................................................................................................. 72
SECTION 10
– I
2
C-COMPATIBLE MASTER INTERFACE .................................................................................................. 76
10.1
– Detailed Description .............................................................................................................................................. 76
10.1.1
– Description of Master I2C Interface ................................................................................................................. 76
10.1.2
– Default Operation ............................................................................................................................................. 76
10.1.3
– I2C Clock Generation ...................................................................................................................................... 76
10.1.4
– Timeout ............................................................................................................................................................ 77
10.1.5
– Generating a START ....................................................................................................................................... 78
10.1.6
– Generating a STOP ......................................................................................................................................... 79
10.1.7
– Transmitting a Slave Address .......................................................................................................................... 80
10.1.8
– Transmitting Data............................................................................................................................................. 80
10.1.9
– Receiving Data................................................................................................................................................. 81
10.1.10
– I2C Master Clock Stretching .......................................................................................................................... 83
10.1.11
– Resetting the I2C Master Controller .............................................................................................................. 83
10.1.12
– Operation as a Slave ..................................................................................................................................... 84
10.1.13
– GPIO .............................................................................................................................................................. 84
10.2
– I2C Master Controller Register Description ........................................................................................................... 85
SECTION 11
C-COMPATIBLE SLAVE INTERFACE ...................................................................................................... 89
