Maxim Integrated DS4830 Optical Microcontroller - Manual (Page 189)

DS4830 User’s Guide
189
To support high priority interrupts while servicing another interrupt source, the IMR register may be used to create a user-
defined prioritization. The IMR mask register should not be utilized when the highest priority interrupt is being serviced
because the highest priority interrupt should never be interrupted. This is default condition when a hardware branch is
made the Interrupt Vector address (INS is set to 1 by hardware and all other interrupt sources are blocked). The code
below demonstrates how to use IMR to allow other interrupts.
ISR_Z:
pop PSF ; restore PSF
push IMR ; save current interrupt mask
move IMR, #int_mask ; new mask to allow only higher priority ints
move INS, #0 ; re-enable interrupts
...
(interrupt servicing code)
...
pop IMR
; restore previous interrupt mask
ret ; back to code or lower priority interrupt
Please note that configuring a given IMR register mask bit to '0' only prevents interrupt conditions from the corresponding
module or system from generating an interrupt request. Configuring an IMR mask bit to '0' does not prevent the
corresponding IIR system or module identification flag from being set. This means that when using the IMR mask register
functionality to block interrupts, there may be cases when both the mask (IMR.x) and identifier (IIR.x) bits should be
considered when determining if the corresponding peripheral should be serviced.
23.8.1 - Conditional return from interrupt
Similar to the conditional returns, the DS4830 microcontroller also supports a set of conditional return from interrupt
operation. Based upon the value of one of the status flags, the CPU can conditionally pop the stack, clear the INS bit to 0,
and begin execution at the address popped from the stack. If the condition is not true, the conditional return from interrupt
instruction leaves the INS bit unchanged, does not pop the stack and does not change the instruction pointer. The
following conditional return from interrupt operations are supported:
RETI C ; if C=1, a RETI is executed
RETI NC ; if C=0, a RETI is executed
RETI Z ; if Z=1 (Acc=00h), a RETI is executed
RETI NZ ; if Z=0 (Acc<>00h), a RETI is executed
RETI S ; if S=1, a RETI is executed
23.9 - Accessing the Stack
The hardware stack is used automatically by the CALL, RET and RETI instructions, but it can also be used explicitly to
store and retrieve data. All values stored on the stack are 16 bits wide.
The PUSH instruction increments the stack pointer SP and then stores a value on the stack. When pushing a 16-bit value
onto the stack, the entire value is stored. However, when pushing an 8-bit value onto the stack, the high byte stored on
the stack comes from the prefix register. The @++SP stack access mnemonic is the associated destination specifier that
generates this push behavior, thus the following two instruction sequences are equivalent:
move PFX[0], IC
push PSF
; stored on stack: IC:PSF
move PFX[0], IC
move @++SP, PSF
; stored on stack: IC:PSF
The POP instruction removes a value from the stack and then decrements the stack pointer. The @SP-- stack access
mnemonic is the associated source specifier that generates this behavior, thus the following two instructions are
equivalent:
pop PSF
move PSF, @SP--
The POPI instruction is equivalent to the POP instruction but additionally clears the INS bit to ‘0’. Thus, the following two
instructions would be equivalent:
popi IP
reti
The @SP-- mnemonic can be utilized by the DS4830 microcontroller so that stack values may be used directly by ALU
operations (e.g. ADD src, XOR src, etc.) without requiring that the value be first popped into an intermediate register or
accumulator.