Maxim Integrated DS4830 Optical Microcontroller - Manual (Page 125)

DS4830 User’s Guide
125
14.4 – PWM Output Code Examples
14.4.1
– 9-bit PWM Output in normal mode with core clock
Creating a 25% duty cycle with 20 kHz frequency PWM output at Channel 0 (default location)
//PWM Configuration for PW0
PWMCN = 0x0000; //Channel 0, Duty cycle
PWMDATA = 0x007F; //25% Duty cycle for 9-bit resolution
PWMCN = 0x0001; //Channel 0, Config register
PWMDATA = 0x1002; //Default location, 9-bit resolution with core clock without pulse spreading, PWMEN
PWMCN = 0x0003; //Channel 0, Delay Configuration
PWMDATA = 0x0000; //No delay
PWMCN_bit.UPDATE = 1; //Update PWM
PWMCN_bit.M_EN = 1; //Master Enable
14.4.2 – 9-bit PWM Output in 4-slot pulse spreading mode with core clock
Creating a 40% duty cycle with 78 kHz frequency PWM output at Channel 1 (default location)
//PWM Configuration for PW1
PWMCN = 0x0010; //Channel1 Duty cycle
PWMDATA = 0x00CD; //40% Duty cycle for 9-bit resolution with core clock
PWMCN = 0x0011; //Channel 1Config register
PWMDATA = 0x1012; //Default location, 9-bit resolution with core clock with 4-slot pulse spreading, PWMEN
PWMCN = 0x0013; //Channel 1 Delay Configuration
PWMDATA = 0x0000; //No delay
PWMCN_bit.UPDATE = 1; //Update PWM
PWMCN_bit.M_EN = 1; //Master Enable
14.4.3 – 12-bit PWM Output in 32-slot pulse spreading mode with alternate location and peripheral clock
Creating a 25% duty cycle with 156 kHz frequency PWM output at Channel 1 (alternate location)
//PWM Configuration for PW1
PWMCN = 0x0010; //Channel 1 Duty cycle
PWMDATA = 0x03FF; //25% Duty cycle for 12-bit resolution
PWMCN = 0x0011; //Channel 1 Config register
PWMDATA = 0x3197; //Alternate location (PW1, Port 2.1), 12-bit resolution with peripheral clock with 32-slot pulse spreading), PWMEN
PWMCN = 0x0013; //Channel 1 Delay Configuration
PWMDATA = 0x0000; //No delay
PWMCN_bit.UPDATE = 1; //Update PWM
PWMCN_bit.M_EN = 1; //Master Enable