2 timer/counter 1 high r, 3 timer/counter 1 low re, 4 timer/counter 1 high r – Maxim Integrated MAXQ Family User Manual
Page 77: 5 timer/counter 1 low re, 2 timer/counter 1 high register (t1h) -6, 3 timer/counter 1 low register (t1l) -6, 4 timer/counter 1 high register (t1ch) -6, 5 timer/counter 1 low register (t1cl) -6, Maxq family user’s guide, 2 timer/counter 1 high register (t1h)
8-6
MAXQ Family User’s Guide
8.2.2 Timer/Counter 1 High Register (T1H)
Bits 7 to 0: Timer/Counter 1 High (T1H.[7:0]). The T1H register is used to load the most significant 8-bit value and least significant
8-bit value of Timer 1.
8.2.3 Timer/Counter 1 Low Register (T1L)
Bits 7 to 0: Timer/Counter 1 Low (T1L.[7:0]). The T1L register is used to read the most significant 8-bit value and least significant 8-
bit value of Timer 1.
8.2.4 Timer/Counter 1 High Register (T1CH)
Bits 7 to 0: Timer/Counter 1 High (T1CH.[7:0]). The T1CH register is used to capture the T1H values when Timer 1 is configured in
capture mode. This register is also used as the MSB of a 16-bit reload value when Timer 1 is configured in auto-reload mode.
8.2.5 Timer/Counter 1 Low Register (T1CL)
Bits 7 to 0: Timer/Counter 1 Low (T1CL.[7:0]). The T1CL register is used to capture the T1L values when Timer 1 is configured in
capture mode. This register is also used as the LSB of a 16-bit reload value when Timer 1 is configured in auto-reload mode.
Bit #
7
6
5
4
3
2
1
0
Name
T1H.7
T1H.6
T1H.5
T1H.4
T1H.3
T1H.2
T1H.1
T1H.0
Reset
0
0
0
0
0
0
0
0
Access
rw
rw
rw
rw
rw
rw
rw
rw
r = read, w = write
Bit #
7
6
5
4
3
2
1
0
Name
T1L.7
T1L.6
T1L.5
T1L.4
T1L.3
T1L.2
T1L.1
T1L.0
Reset
0
0
0
0
0
0
0
0
Access
rw
rw
rw
rw
rw
rw
rw
rw
r = read, w = write
Bit #
7
6
5
4
3
2
1
0
Name
T1CH.7
T1CH.6
T1CH.5
T1CH.4
T1CH.3
T1CH.2
T1CH.1
T1CH.0
Reset
0
0
0
0
0
0
0
0
Access
rw
rw
rw
rw
rw
rw
rw
rw
r = read, w = write
Bit #
7
6
5
4
3
2
1
0
Name
T1CL.7
T1CL.6
T1CL.5
T1CL.4
T1CL.3
T1CL.2
T1CL.1
T1CL.0
Reset
0
0
0
0
0
0
0
0
Access
rw
rw
rw
rw
rw
rw
rw
rw
r = read, w = write
Maxim Integrated