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6 in circuit debug data, 7 in circuit debug addr, 6 in circuit debug data register (icdd) -16 – Maxim Integrated MAXQ Family User Manual

Page 174: 7 in circuit debug address register (icda) -16, Maxq family user’s guide, 6 in-circuit debug data register (icdd), 7 in-circuit debug address register (icda)

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16.3.6 In-Circuit Debug Data Register (ICDD)

Bits 15 to 0: In-Circuit Debug Data (ICDD.[15:0]). This register is used by the debug engine to store data/read count so that ROM
code can view that information. This register is also used by the debug engine as a data register for content matching when BP5 is

used as a register breakpoint. In this case, only data bits in this register with their corresponding mask bits in the ICDA register set will

be compared with the updated destination data to determine if a break should be generated.

16.3.7 In-Circuit Debug Address Register (ICDA)

Bits 15 to 0: In-Circuit Debug Address (ICDA.[15:0]). This register is used by the debug engine to addresses so that ROM code can
view that information. This register is also used by the debug engine as a mask register to mask out don’t care bits in the ICDD regis-

ter when BP5 is used as a register breakpoint. When a bit in this register is set to 1, the corresponding bit location in the ICDD regis-

ter will be compared to the data being written to the destination register to determine if a break should be generated. When a bit in this

register is cleared, the corresponding bit in the ICDD register becomes a don’t care and is not compared against the data being writ-

ten. When all bits in this register are cleared, any updated data pattern will cause a break when the BP5 register matches the desti-

nation register address of the current instruction.

16-16

MAXQ Family User’s Guide

Bit #

15

14

13

12

11

10

9

8

Name

ICDD.15

ICDD.14

ICDD.13

ICDD.12

ICDD.11

ICDD.10

ICDD.9

ICDD.8

Reset

0

0

0

0

0

0

0

0

Access

r

r

r

r

r

r

r

r

Bit #

7

6

5

4

3

2

1

0

Name

ICDD.7

ICDD.6

ICDD.5

ICDD.4

ICDD.3

ICDD.2

ICDD.1

ICDD.0

Reset

0

0

0

0

0

0

0

0

Access

r

r

r

r

r

r

r

r

r = read

Bit #

15

14

13

12

11

10

9

8

Name

ICDA.15

ICDA.14

ICDA.13

ICDA.12

ICDA.11

ICDA.10

ICDA.9

ICDA.8

Reset

0

0

0

0

0

0

0

0

Access

r

r

r

r

r

r

r

r

Bit #

7

6

5

4

3

2

1

0

Name

ICDA.7

ICDA.6

ICDA.5

ICDA.4

ICDA.3

ICDA.2

ICDA.1

ICDA.0

Reset

0

0

0

0

0

0

0

0

Access

r

r

r

r

r

r

r

r

r = read

Maxim Integrated