Maxim Integrated MAXQ Family - Manual (Page 19)

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MAXQ Family User’s Guide
The external clock and crystal are mutually exclusive since they are input via the same clock pin. The basic clock source selection is
made through two bits: RGSL and XT/RC. The RGSL bit controls selection of the internal ring oscillator for system clock generation. When
RGSL = 1, the internal ring oscillator is used for system clock generation. The RGSL bit is read/write accessible at any time and defaults
to logic 0 on power-on reset only, allowing the internal ring oscillator to be used for system clock generation until the crystal warmup
completes or until user code selects the XTAL1 pin configuration corresponding to an external RC (XT/RC =0). The XT/RC bit is writable
only when the internal ring oscillator is explicitly selected for system clock generation (RGSL=1). The user code then must disable the
internal ring oscillator (RGSL = 0) for the XT/RC elected clock source to take effect. Since RGSL and XT/RC reside in the same register,
an external clock source selection can be made in the same instruction as the ring oscillator is disabled. Once the ring oscillator is dis-
abled, RGSL = 0, the RGMD bit can be used to assess when the switchover to the source defined by XT/RC has occurred. The exter-
nal RC clock selection (XT/RC =0) requires a 4-cycle count before it can be used, while the external crystal/resonator or external clock
selection (XT/RC = 1) requires a 65,536-cycle count before it can be used. Requiring some type of warmup period for both external clock
possibilities (crystal or RC) also serves as protection against an errant change of the XT/RC bit that produces a mismatch of XTAL1,
XTAL2 pin function and external clock circuitry.
Each time code execution must start or restart (as may be the case when exiting stop mode) using the external clock source, the fol-
lowing sequence occurs:
• Reset the crystal warmup counter, and
• Allow the required warmup delay:
- 65,536 external clock cycles if XT/RC = 1 and exiting from stop mode
- four external clock cycles if XT/RC = 0
• During the warmup sequence, code execution may commence from the internal ring oscillator provided that one is present in the
given MAXQ device. The user code may detect when the automatic switchover from the internal ring oscillator to the selected XT/RC
source occurs by polling the RGMD status bit. If the RGSL bit is returned to logic 1 state (internal ring selection) while a warmup is
in progress, the crystal amplifier or RC oscillator shuts down and the warmup process terminates.
2.7.1 Internal Ring Oscillator
The MAXQ microcontroller can source its main clock directly from an internal ring oscillator. The ring frequency varies over process,
temperature, and supply voltage. For synchronization and timing purposes, the ring oscillator resets anytime it is selected for use as
the primary system clock. The ring oscillator clock is divided down according to the PMME, CD1:0 bit selections just the same as the
external non-ring clock possibilities. There is a four-cycle warmup delay associated with the internal ring oscillator when the system is
going through a power-on reset or returning from the Stop mode.
2.7.2 External Clock (Crystal/Resonator)
An external quartz crystal or a ceramic resonator can be connected from XTAL1 to XTAL2 as the device determining the frequency, as
illustrated in Figure 2-8. The fundamental mode of the crystal operates as inductive reactance in parallel resonance with external
capacitance to the crystal.
Crystal specifications, operating temperature, operating voltage, and parasitic capacitance must be considered when designing the
internal oscillator. To further reduce the effects of external noise, a guard ring can be placed around the oscillator circuitry.
Pins XTAL1 and XTAL2 are protected by clamping devices against on-chip electrostatic discharge. These clamping devices are diodes
parasitic to the feedback resistor Rf in the inverter circuit of the oscillator. The inverter circuit is presented as a NAND gate, which can
disable clock generation in STOP mode or if the internal ring oscillator is explicitly selected for use (i.e., RGSL = 1).
Noise at XTAL1 and XTAL2 can adversely affect on-chip clock timing. It is good design practice to place the crystal and capacitors near
the oscillator circuitry and connect to XTAL1, XTAL2, and ground with direct shot trace. The typical values of external capacitors vary
with the type of crystal used and should be initially selected based on the load capacitance as suggested by the crystal manufacturer.
For cost-sensitive applications, a ceramic resonator can be used instead of a crystal. Using the ceramic resonator may require a dif-
ferent circuit configuration and capacitance value.
2.7.3 External Clock (Direct Input)
The MAXQ CPU can also obtain the system clock signal directly from an external clock source. In this configuration, the clock gener-
ation circuitry is driven directly by an external clock.
To operate the core from an external clock, connect the clock source to the XTAL1 pin and leave the XTAL2 pin floating. The clock
source should be driven through a CMOS driver. If the clock driver is a TTL gate, its output must be connected to VCC through a pullup
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