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Maxq family user’s guide – Maxim Integrated MAXQ Family User Manual

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MAXQ Family User’s Guide

The Frame Pointer (BP[OFFS]) is actually composed of a base pointer (BP) and an offset from the base pointer (OFFS). For the frame

pointer, the offset register (OFFS) is the target of any increment or decrement operation. The base pointer (BP) is unaffected by incre-

ment and decrement operations on the Frame Pointer. Similar to DP[n], the OFFS register may be pre-incremented/decremented when

writing to data memory and may be post-incremented/decremented when reading from data memory.

move A[0], @BP[OFFS--]

; decrement OFFS after read

move @BP[++OFFS], A[1]

; increment OFFS before write

All three data pointers support both byte and word access to data memory. Each data pointer has its own word/byte select (WBSn)

special-function register bit to control the access mode associated with the data pointer. These three register bits (WBS2, which con-

trols BP[Offs] access; WBS1, which controls DP[1] access; and WBS0, which controls DP[0] access) reside in the Data Pointer Control

(DPC) register. When a given WBSn control bit is configured to 1, the associated pointer is operated in the word access mode. When

the WBSn bit is configured to 0, the pointer is operated in the byte access mode. Word access mode allows addressing of 64kWords

of memory while byte access mode allows addressing of 64kBytes of memory.

Each data pointer (DP[n]) and Frame Pointer base (BP) register is actually implemented internally as a 17-bit register (e.g., 16:0). The Frame

Pointer offset register (OFFS) is implemented internally as a 9-bit register (e.g., 8:0). The WBSn bit for the respective pointer controls whether

the highest 16 bits (16:1) of the pointer are in use, as is the case for word mode (WBSn = 1) or whether the lowest 16 bits (15:0) are in use,

as will be the case for byte mode (WBSn = 0). The WBS2 bit also controls whether the high 8 bits (8:1) of the offset register are in use

(WBS2 = 1) or the low 8 bits (7:0) are used (WBS2 = 0). All data pointer register reads, writes, auto-increment/decrement operations occur

with respect to the current WBSn selection. Data pointer increment and decrement operations only affect those bits specific to the current

word or byte addressing mode (e.g., incrementing a byte mode data pointer from FFFFh does not carry into the internal high order bit that

is utilized only for word mode data pointer access). Switching from byte to word access mode or vice versa does not alter the data pointer

contents. Therefore, it is important to maintain the consistency of data pointer address value within the given access mode.

move DPC, #0

; DP[0] in byte mode

move DP[0], #2345h ; DP[0]=2345h (byte mode)

; internal bits 15:0 loaded

move DPC, #4

; DP[0] in word mode

move DP[0], #2345h

; DP[0]=2345h (word mode)

; internal bits 16:1 loaded

move DPC, #0

; DP[0] in byte mode

move GR, DP[0]

; GR = 468Bh (looking at bits 15:0)

The three pointers share a single read/write port on the data memory and thus, the user must knowingly activate a desired pointer

before using it for data memory read operations. This can be done explicitly using the data pointer select bits (SDPS1:0; DPC.1:0), or

implicitly by writing to the DP[n], BP, or OFFS registers as shown below. Any indirect memory write operation using a data pointer will

set the SDPS bits, thus activating the write pointer as the active source pointer.

move DPC, #2

; (explicit) selection of FP as the pointer

move DP[1], DP[1]

; (implicit) selection of DP[1]; set SDPS1:0=01b

move OFFS, src

; (implicit) selection of FP; set SDPS1=1

move @DP[0], src

; (implicit) selection of DP[0]; set SDPS1:0=00b

Once the pointer selection has been made, it will remain in effect until:

the source data pointer select bits are changed via the explicit or implicit methods described above (i.e., another data pointer is

selected for use)

the memory to which the active source data pointer is addressing is enabled for code fetching using the Instruction Pointer, or

a memory write operation is performed using a data pointer other than the current active source pointer.

move DP[1], DP[1]

; select DP[1] as the active pointer

move dst, @DP[1]

; read from pointer

move @DP[1], src

; write using a data pointer

; DP[0] is needed

move DP[0], DP[0]

; select DP[0] as the active pointer

To simplify data pointer increment/decrement operations without disturbing register data, a virtual NUL destination has been assigned

to system module 6, sub-index 7 to serve as a bit bucket. Data pointer increment/decrement operations can be done as follows with-

out altering the contents of any other register:

move NUL, @DP[0]++

; increment DP[0]

move NUL, @DP[0]--

; decrement DP[0]

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