Avago Technologies LSI53C825AE - Manual (Page 97)

Configuration Registers 4-9
Register: 0x0E
Header Type
Read Only
HT[7:0] Header Type [7:0]
This register identifies the layout of bytes 0x10 through
0x3F in configuration space and also whether or not the
device contains multiple functions. The value of this
register is 0x00.
Register: 0x10
Base Address Zero (I/O)
Read/Write
BARZ Base Address Register Zero (I/O) [31:0]
This 32-bit register has bit zero hardwired to one. Bit 1 is
reserved and must return a zero on all reads, and the
other bits are used to map the device into I/O space.
Register: 0x14
Base Address One (Memory)
Read/Write
BARO Base Address Register One [31:0]
This register has bit 0 hardwired to zero. For detailed
information on the operation of this register, refer to the
PCI Specification.
7 0
HT
0 0 0 0 0 0 0 0
31 0
BARZ
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x 1
31 0
BARO
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x 0