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Scratch register b (scratchb) – Avago Technologies LSI53C825AE User Manual

Page 183

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Operating Registers

4-95

Registers: 0x5C–0x5F (0xDC–0xDF)

Scratch Register B (SCRATCHB)
Read/Write

SCRATCHB

Scratch Register B

[31:0]

This is a general purpose user definable scratch pad
register. Apart from CPU access, only register read/write
and memory moves directed at the SCRATCH register
alter its contents. The LSI53C825A cannot fetch
SCRIPTS instructions from this location. When bit 3 in
the

Chip Test Two (CTEST2)

register is set, this register

contains the base address for the 4 Kbyte internal RAM.
Setting

Chip Test Two (CTEST2),

bit 3 only causes the

base address to appear in the

Scratch Register B

(SCRATCHB)

register; any information that was

previously in the register remains intact. Any writes to this
register while the bit is set passes through the actual

Scratch Register B (SCRATCHB)

register. The power-up

values are indeterminate.

Registers: 0x60–0x7F (0xE0–0xFF)

Scratch Registers C–J (SCRATCHC–SCRATCHJ)
Read/Write

These registers are general purpose scratch registers for user defined
functions. The LSI53C825A cannot fetch SCRIPTS instructions from this
location. The power-up value of these registers is indeterminate.

31

0

SCRATCHB

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x