Avago Technologies LSI53C825AE User Manual
Page 113
Operating Registers
4-25
IARB
Immediate Arbitration
1
Setting this bit causes the SCSI core to immediately
begin arbitration once a Bus Free phase is detected
following an expected SCSI disconnect. This bit is useful
for multithreaded applications. The ARB[1:0] bits in
are set for full arbitration and
selection before setting this bit.
Arbitration is retried until won. At that point, the
LSI53C825A holds BSY and SEL asserted, and waits for
a select or reselect sequence. The Immediate Arbitration
bit is reset automatically when the selection or reselection
sequence is completed, or times out.
An unexpected disconnect condition will clear IARB
without attempting arbitration. See the SCSI Disconnect
Unexpected bit (
, bit 7) for
more information on expected versus unexpected
disconnects.
It is possible to abort an immediate arbitration sequence.
First, set the Abort bit in the
register. Then one of two things eventually happens:
•
The Won Arbitration bit (
bit 2) is set. In this case, the Immediate Arbitration bit
needs to be reset. This will complete the abort
sequence and disconnect the LSI53C825A from the
SCSI bus. If it is not acceptable to go to Bus Free
phase immediately following the arbitration phase, a
low level selection may be performed instead.
•
The abort completes because the LSI53C825A loses
arbitration. This can be detected by the Immediate
Arbitration bit being cleared. Do not use the Lost
Arbitration bit (
, bit 3) to
detect this condition. In this case take no further
action.
SST
Start SCSI Transfer
0
This bit is automatically set during SCRIPTS execution
and should not be used. It causes the SCSI core to begin
a SCSI transfer, including SREQ/ and SACK/
handshaking. The determination of whether the transfer
is a send or receive is made according to the value
written to the I/O bit in
. This bit is self-clearing. Do not set it for low level
operation.