Avago Technologies LSI53C825AE - Manual (Page 239)

AC Characteristics 6-11
6.3 AC Characteristics
The AC characteristics described in this section apply over the entire
range of operating conditions (refer to the
Section 6.1, “DC
Characteristics” ). Chip timings are based on simulation at worst case
voltage, temperature, and processing. Timing was developed with a load
capacitance of 50 pF.
Table 6.16 and Figure 6.6 provide External Clock
timing data.
Figure 6.6 External Clock
Table 6.16 External Clock
Symbol Parameter Min Max Unit
t
1
Bus clock cycle time 30 DC ns
SCSI clock cycle time (SCLK)
1
1. This parameter must be met to ensure SCSI timings are within specification.
12.5 60 ns
t
2
CLK LOW time
2
2. Duty cycle not to exceed 60/40.
12 – ns
SCLK LOW time
2
5 – ns
t
3
CLK HIGH time
2
12 – ns
SCLK HIGH time
2
5 – ns
t
4
CLK slew rate 1 – V/ns
SCLK slew rate 1 – V/ns
CLK, SCLK
t
1
t
3
t
4
t
2